TDA9870A/V2 データシートの表示（PDF） - Philips Electronics

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TDA9870A/V2

Digital TV Sound Processor (DTVSP)

Philips Electronics 

Philips Semiconductors

Digital TV Sound Processor (DTVSP)

Product specification

TDA9870A

6 FUNCTIONAL DESCRIPTION

6.1 Demodulator and decoder section

6.1.1 SIF INPUT

Two input pins are provided: SIF1 e.g. for terrestrial TV

and SIF2 e.g. for a satellite tuner. For higher SIF signal

levels the SIF input can be attenuated with an internally

switchable −10 dB resistor divider. As no specific filters are

integrated, both inputs have the same specification giving

flexibility in application. The selected signal is passed

through an AGC circuit and then digitized by an 8-bit ADC

operating at 24.576 MHz.

6.1.2 AGC

The gain of the AGC amplifier is controlled from the ADC

output by means of a digital control loop employing

hysteresis. The AGC has a fast attack behaviour to

prevent ADC overloads and a slow decay behaviour to

prevent AGC oscillations. For AM demodulation the AGC

must be switched off. When switched off, the control loop

is reset and fixed gain settings can be chosen

(see Table 14; subaddress 0).

The AGC can be controlled via the I2C-bus. Details can be

found in the I2C-bus register definitions (see Chapter 10).

6.1.3 MIXER

The digitized input signal is fed to the mixers, which mix

one or both input sound carriers down to zero IF. A 24-bit

control word for each carrier sets the required frequency.

Access to the mixer control word registers is via the

I2C-bus.

6.1.5 FM IDENTIFICATION

The identification of the FM sound mode is performed by

AM synchronous demodulation of the pilot signal and

narrow-band detection of the identification frequencies.

The result is available via the I2C-bus interface. A selection

can be made via the I2C-bus for B/G, D/K and M standard

and for three different modes that represent different

trade-offs between speed and reliability of identification.

6.1.6 CRYSTAL OSCILLATOR

The circuitry of the crystal oscillator is fully integrated, only

the external 24.576 MHz crystal is needed (see Fig.10).

6.1.7 TEST PINS

Test pins TEST1 and TEST2 are active HIGH and in

normal operating mode of the device they are connected

to VSSD1. Test functions are for manufacturing tests only

and are not available to customers. Without external

circuitry these pins are pulled down to LOW level with

internal resistors.

6.1.8 POWER FAIL DETECTOR

The power fail detector monitors the internal power supply

for the digital part of the device. If the supply has

temporarily been lower than the specified lower limit, the

Power-on reset bit POR (see Section 10.4.1), will be set to

logic 1. Bit CLRPOR (see Section 10.3.2) resets the

Power-on reset flip-flop to LOW. If this is detected, an

initialization of the TDA9870A has to be carried out to

ensure reliable operation.

6.1.4 FM AND AM DEMODULATION

An FM or AM input signal is fed via a band-limiting filter to

a demodulator that can be used for either FM or AM

demodulation. Apart from the standard (fixed)

de-emphasis characteristic, an adaptive de-emphasis is

available for encoded satellite programs. A stereo decoder

recovers the left and right signal channels from the

demodulated sound carriers. Both the European and

Korean stereo systems are supported.

1999 Dec 20

11

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