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TDK5110 データシートの表示(PDF) - Infineon Technologies

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TDK5110 Datasheet PDF : 41 Pages
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TDK 5110
Functional Description
8 CLKOUT
8
300
Clock output to supply an external device.
An external pull-up resistor has to be added
in accordance to the driving requirements of
the external device.
A clock frequency of 3.39 MHz is selected
by a logic low at CLKDIV input (pin 9).
A clock frequency of 847.5 kHz is selected
by a logic high at CLKDIV input (pin 9).
9
CLKDIV
This pin is used to select the desired clock
+1.2 V
VS
division rate for the CLKOUT signal.
A logic low (CLKDIV < 0.2 V) applied to this
pin selects the 3.39 MHz output signal at
5 µA
CLKOUT (pin 8).
60 k
9
60 k
A logic high (CLKDIV open) applied to this
pin selects the 847.5 kHz output signal at
+0.8 V CLKOUT (pin 8).
10 COSC
VS
6 k
10
This pin is connected to the reference oscil-
lator circuit.
The reference oscillator is working as a neg-
ative impedance converter. It presents a
negative resistance in series to an induc-
tance at the COSC pin.
100 µA
11 FSKOUT
12 FSKGND
VS
200 µA
1.5 k
11
12
This pin is connected to a switch to
FSKGND (pin 12).
The switch is closed when the signal at
FSKDTA (pin 7) is in a logic low state.
The switch is open when the signal at
FSKDTA (pin 7) is in a logic high state.
FSKOUT can switch an additional capacitor
to the reference crystal network to pull the
crystal frequency by an amount resulting in
the desired FSK frequency shift of the trans-
mitter output frequency.
Ground connection for FSK modulation out-
put FSKOUT.
Wireless Components
3-5
Specification, October 2002

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