TFRA08C13 データシートの表示（PDF） - Agere -> LSI Corporation

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TFRA08C13

OCTAL T1/E1 Framer

Agere -> LSI Corporation 

Preliminary Data Sheet

October 2000

TFRA08C13 OCTAL T1/E1 Framer

Tables

Table of Contents (continued)

Page

Table 73. Facility Event Register-2 (FRM_SR4) (Y04) ........................................................................................132

Table 74. Exchange Termination and Exchange Termination Remote

End Interface Status Register (FRM_SR5) (Y05) ..............................................................................................133

Table 75. Network Termination and Network Termination Remote End

Interface Status Register (FRM_SR6) (Y06)......................................................................................................134

Table 76. Facility Event Register (FRM_SR7) (Y07) ............................................................................................135

Table 77. Bipolar Violation Counter Registers (FRM_SR8—FRM_SR9) (Y08—Y09) .........................................135

Table 78. Framing Bit Error Counter Registers (FRM_SR10—FRM_SR11) (Y0A—Y0B)....................................135

Table 79. CRC Error Counter Registers (FRM_SR12—FRM_SR13) (Y0C—Y0D) .............................................136

Table 80. E-Bit Counter Registers (FRM_SR14—FRM_SR15) (Y0E—Y0F) .......................................................136

Table 81. CRC-4 Errors at NT1 from NT2 Counter Registers (FRM_SR16—FRM_SR17) (Y10—Y11) ..............136

Table 82. E Bit at NT1 from NT2 Counter (FRM_SR18—FRM_SR19) (Y12—Y13) ............................................136

Table 83. ET Errored Seconds Counter (FRM_SR20—FRM_SR21) (Y14—Y15) ...............................................137

Table 84. ET Bursty Errored Seconds Counter (FRM_SR22—FRM_SR23) (Y16—Y17) ....................................137

Table 85. ET Severely Errored Seconds Counter (FRM_SR24—FRM_SR25) (Y18—Y19) ................................137

Table 86. ET Unavailable Seconds Counter (FRM_SR26—FRM_SR27) (Y1A—Y1B)........................................137

Table 87. ET-RE Errored Seconds Counter (FRM_SR28—FRM_SR29) (Y1C—Y1D) ........................................137

Table 88. ET-RE Bursty Errored Seconds Counter (FRM_SR30—FRM_SR31) (Y1E—Y1F)..............................137

Table 89. ET-RE Severely Errored Seconds Counter (FRM_SR32—FRM_SR33) (Y20—Y21)...........................137

Table 90. ET-RE Unavailable Seconds Counter (FRM_SR34—FRM_SR35) (Y22—Y23) ...................................138

Table 91. NT1 Errored Seconds Counter (FRM_SR36—FRM_SR37) (Y24—Y25).............................................138

Table 92. NT1 Bursty Errored Seconds Counter (FRM_SR38—FRM_SR39) (Y26—Y27)..................................138

Table 93. NT1 Severely Errored Seconds Counter (FRM_SR40—FRM_SR41) (Y28—Y29) ..............................138

Table 94. NT1 Unavailable Seconds Counter (FRM_SR42—FRM_SR43) (Y2A—Y2B)......................................138

Table 95. NT1-RE Errored Seconds Counter (FRM_SR44—FRM_SR45) (Y2C—Y2D) .....................................138

Table 96. NT1-RE Bursty Errored Seconds Counter (FRM_SR46—FRM_SR47) (Y2E—Y2F) ...........................138

Table 97. NT1-RE Severely Errored Seconds Counter (FRM_SR48—FRM_SR49) (Y30—Y31) ........................138

Table 98. NT1-RE Unavailable Seconds Counter (FRM_SR50—FRM_SR51) (Y32—Y33) ................................139

Table 99. Receive NOT-FAS TS0 Register (FRM_SR52) (Y34) ...........................................................................139

Table 100. Receive Sa Register (FRM_SR53) (Y35) ...........................................................................................139

Table 101. SLC-96 FDL Receive Stack (FRM_SR54—FRM_SR63) (Y36—Y3F) ...............................................139

Table 102. CEPT Sa Receive Stack (FRM_SR54—FRM_SR63) (Y36—Y3F) ....................................................140

Table 103. Transmit Framer ANSI Performance Report Message Status Register Structure ..............................140

Table 104. Received Signaling Registers: DS1 Format (FRM_RSR0—FRM_RSR23) (Y40—Y58) ....................140

Table 105. Receive Signaling Registers: CEPT Format (FRM_RSR0—FRM_RSR31) (Y40—Y5F) ...................141

Table 106. Summary of Interrupt Group Enable Registers (FRM_PR0—FRM_PR7) (Y60—Y67) ......................141

Table 107. Primary Interrupt Group Enable Register (FRM_PR0) (Y60) .............................................................142

Table 108. Interrupt Enable Register (FRM_PR1) (Y61) ......................................................................................142

Table 109. Interrupt Enable Register (FRM_PR2) (Y62) ......................................................................................142

Table 110. Interrupt Enable Register (FRM_PR3) (Y63) ......................................................................................142

Table 111. Interrupt Enable Register (FRM_PR4) (Y64) ......................................................................................143

Table 112. Interrupt Enable Register (FRM_PR5) (Y65) ......................................................................................143

Table 113. Interrupt Enable Register (FRM_PR6) (Y66) ......................................................................................143

Table 114. Interrupt Enable Register (FRM_PR7) (Y67) ......................................................................................143

Table 115. Framer Mode Bits Decoding (FRM_PR8) (Y68) .................................................................................143

Table 116. Line Code Option Bits Decoding (FRM_PR8) (Y68)...........................................................................144

Table 117. CRC Option Bits Decoding (FRM_PR9) (Y69) ...................................................................................144

Table 118. Alarm Filter Register (FRM_PR10) (Y6A)...........................................................................................145

Table 119. Errored Event Threshold Definition.....................................................................................................145

Table 120. Errored Second Threshold Register (FRM_PR11) (Y6B) ...................................................................146

Lucent Technologies Inc.

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