TJA1041A データシートの表示（PDF） - Philips Electronics

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TJA1041A

High speed CAN transceiver

Philips Electronics 

Philips Semiconductors

High speed CAN transceiver

Product specification

TJA1041A

Pins RXD and ERR will reflect any wake-up requests

(provided that VI/O and VCC are present).

GO-TO-SLEEP COMMAND MODE

The go-to-sleep command mode is the controlled route for

entering sleep mode. In go-to-sleep command mode the

transceiver behaves as if in standby mode, plus a

go-to-sleep command is issued to the transceiver. After

remaining in go-to-sleep command mode for the minimum

hold time (th(min)), the transceiver will enter sleep mode.

The transceiver will not enter the sleep mode if the state of

pins STB or EN is changed or the UVBAT, pwon or

wake-up flag is set before th(min) has expired.

SLEEP MODE

The sleep mode is the second-level power saving mode of

the transceiver. Sleep mode is entered via the go-to-sleep

command mode, and also when the undervoltage

detection time on either VCC or VI/O elapses before that

voltage level has recovered. In sleep mode the transceiver

still behaves as described for standby mode, but now

pin INH is set floating. Voltage regulators controlled by

pin INH will be switched off, and the current into pin VBAT

is reduced to a minimum. Waking up a node from sleep

mode is possible via the wake-up flag and (as long as the

UVNOM flag is not set) via pin STB.

Internal flags

The TJA1041A makes use of seven internal flags for its

fail-safe fallback mode control and system diagnosis

support. Table 1 shows the relation between flags and

operating modes of the transceiver. Five of the internal

flags can be made available to the controller via pin ERR.

Table 2 shows the details on how to access these flags.

The following sections describe the seven internal flags.

Table 2 Accessing internal flags via pin ERR

Internal flag

Flag is available on pin ERR(1)

Flag is cleared

UVNOM

UVBAT

pwon

wake-up

wake-up source

bus failure

local failure

no

by setting the pwon or wake-up flag

no

when VBAT has recovered

in pwon/listen-only mode (coming from standby

on entering normal mode

mode, go-to-sleep command mode, or sleep mode)

in standby mode, go-to-sleep command mode, and on entering normal mode, or by setting the

sleep mode (provided that VI/O and VCC are present) pwon or UVNOM flag

in normal mode (before the fourth dominant to

on leaving normal mode, or by setting the

recessive edge on pin TXD; note 2)

pwon flag

in normal mode (after the fourth dominant to

recessive edge on pin TXD; note 2)

on re-entering normal mode

in pwon/listen-only mode (coming from normal

mode)

on entering normal mode or when RXD is

dominant while TXD is recessive (provided

that all local failures are resolved)

Notes

1. Pin ERR is an active-LOW output, so a LOW level indicates a set flag and a HIGH level indicates a cleared flag. Allow

pin ERR to stabilize for at least 8 µs after changing operating modes.

2. Allow for a TXD dominant time of at least 4 µs per dominant-recessive cycle.

2004 Feb 20

8

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