LH540202U-35 データシートの表示（PDF） - Sharp Electronics

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LH540202U-35

CMOS 1024 × 9 Asynchronous FIFO

Sharp Electronics 

CMOS 1024 × 9 Asynchronous FIFO

LH540202

OPERATIONAL MODES (cont’d)

Compound FIFO Expansion

A combination of word-width expansion and depth

cascading may be implemented easily by operating

groups of depth-cascaded FIFOs in parallel.

Bidirectional FIFO Operation

Bidirectional data buffering between two systems may

be implemented by operating LH540202 devices in par-

allel, but in opposite directions. The Data In inputs of each

LH540202 are tied to the corresponding Data Out outputs

of another LH540202, which is operating in the opposite

direction, to form a single bidirectional bus interface.Care

must be taken to assure that the appropriate read, write,

and flag signals are routed to each system. Both word-

width expansion and depth cascading may be used in

bidirectional applications.

Q0 - Q8

Q0 - Q17

Q0 - QN-10

Q0 - QN-1

DATA OUT

R

W

RS

DATA IN

LH540202

DEPTH EXPANSION

BLOCK

LH540202

DEPTH EXPANSION

BLOCK

LH540202

DEPTH EXPANSION

BLOCK

D0 - DN-1

D9 - DN-1

D18 - DN-1

DN-9 - DN-1

Figure 7. Compound FIFO Expansion

ARRAY STORES

N-BIT WORDS.

540202-20

Wa

FFa

RS

SYSTEM A

Ra

EFa

HFa

RTa

LH540202

Da0 - 8

Qb0 - 8

XI

Qa0 - 8

Db0 - 8

LH540202

XI

Rb

EFb

HFb

RTb

SYSTEM B

Wb

FFb

RS

Figure 8. Bidirectional FIFO Operation

(1024 × 9 × 2)

540202-21

7

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