AD7545ALPZ-REEL データシートの表示（PDF） - Analog Devices

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AD7545ALPZ-REEL

CMOS 12-Bit Buffered Multiplying DAC

Analog Devices 

AD7545A–SPECIFICATIONS (VREF = ؎10 V, VOUT1 = O V, AGND = DGND unless otherwise noted)

Parameter

STATIC PERFORMANCE

Resolution

Relative Accuracy

Differential Nonlinearity

Gain Error

Gain Temperature Coefficient2

∆Gain/∆Temperature

DC Supply Rejection2

∆Gain/∆VDD

Output Leakage Current at OUT1

DYNAMIC PERFORMANCE

Current Settling Time2

Version

All

K, B, T

L, C, U

All

K, B, T

L, C, U

All

All

All

K, L

B, C

T, U

All

VDD = +5 V

Limits

TA = + 25؇C TMIN–TMAX1

VDD = +15 V

Limits

TA = + 25؇C TMIN–TMAX1

Units

12

± 1/2

± 1/2

±1

±3

±1

±5

±2

0.002

10

10

10

12

± 1/2

± 1/2

±1

±4

±2

±5

±2

0.004

50

50

200

12

± 1/2

± 1/2

±1

±3

±1

±5

±2

0.002

10

10

10

12

± 1/2

± 1/2

±1

±4

±2

±5

±2

0.004

50

50

200

Bits

LSB max

LSB max

LSB max

LSB max

LSB max

ppm/°C max

ppm/°C typ

% per % max

nA max

nA max

nA max

1

1

1

1

µs max

Propagation Delay2 (from Digital

Input Change to 90%

of Final Analog Output)

All

200

–

Digital-to-Analog Glitch Impulse

All

5

–

150

–

5

–

ns max

nV sec typ

AC Feedthrough2, 4

At OUT1

All

5

5

5

5

mV p-p typ

REFERENCE INPUT

Input Resistance

(Pin 19 to GND)

All

10

10

10

10

kΩ min

20

20

20

20

kΩ max

ANALOG OUTPUTS

Output Capacitance2

COUT1

COUT1

DIGITAL INPUTS

Input High Voltage

VIH

Input Low Voltage

VIL

Input Current5

IIN

Input Capacitance2

DB0–DB11, WR, CS

All

70

70

70

70

pF max

150

150

150

150

pF max

All

2.4

2.4

13.5

13.5

V min

All

0.8

0.8

1.5

1.5

V max

All

±1

± 10

±1

± 10

µA max

All

8

8

8

8

pF max

SWITCHING CHARACTERISTICS2

Chip Select to Write Setup Time

K, B, L, C 100

130

75

tCS

T, U

100

170

75

Chip Select to Write Hold Time

tCH

Write Pulse Width

All

0

0

0

K, B, L, C 100

130

75

tWR

Data Setup Time

T, U

100

170

75

tDS

Data Hold Time

All

100

150

60

tDH

All

5

5

5

85

ns min

95

ns min

0

ns min

85

ns min

95

ns min

80

ns min

5

ns min

POWER SUPPLY

VDD

IDD

All

5

5

15

15

V

All

2

2

2

2

mA max

100

100

100

100

µA max

10

10

10

10

µA typ

NOTES

1Temperature range as follows: K, L Versions = 0°C to +70°C; B, C Versions = –25°C to +85°C; T, U Versions = –55°C to +125°C.

2Sample tested to ensure compliance.

3DB0–DB11 = 0 V to VDD or VDD to 0 V.

4Feedthrough can be further reduced by connecting the metal lid on the ceramic package to DGND.

6Logic inputs are MOS gates. Typical input current (+25°C) is less than 1 nA.

Specifications subject to change without notice.

Test Conditions/Comments

Endpoint Measurement

All Grades Guaranteed 12-Bit

Monotonic Over Temperature

Measured Using Internal RFB.

DAC Register Loaded with All 1s.

∆VDD = ± 5%

DB0–DB11 = 0 V; WR, CS = 0 V

To 1/2 LSB. OUT1 Load = 100 Ω,

CEXT = 13 pF. DAC Output Measured

from Falling Edge of WR, CS = 0 V.

OUT1 Load = 100 Ω, CEXT = 13 pF3

VREF = AGND. OUT1 Load = 100 Ω,

Alternately Loaded with All 0s and 1s.

VREF = ± 10 V, 10 kHz Sine Wave

Input Resistance TC = –300 ppm/°C typ

Typical Input Resistance = 15 kΩ

DB0–DB11 = 0 V, WR, CS = 0 V

DB0–DB11 = VDD, WR, CS = 0 V

VIN = 0 or VDD

See Timing Diagram

tCS ≥ tWR, TCH ≥ 0

± 5% For Specified Performance

All Digital Inputs VIL or VIH

All Digital Inputs 0 V or VDD

All Digital Inputs 0 V or VDD

–2–

REV. C

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