AD9856(RevB) データシートの表示（PDF） - Analog Devices
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AD9856 Datasheet PDF : 32 Pages
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AD9856
PIN FUNCTION DESCRIPTIONS
Pin # Pin Name
1
TxENABLE
2
3
4, 10,
21, 44
5, 11,
20, 43
6–9
12–16
17
D11
D10
DVDD
DGND
D9–D6
D5–D1
D0
18, 19,
22
23, 28,
31
24
25
26
27
NC
AGND
BG REF BYPASS
DAC RSET
DAC REF BYPASS
AVDD
Pin Function
Input Pulse that Synchronizes
the Data Stream
Input Data (Most Significant Bit)
Input Data
Digital Supply Voltage
Digital Ground
Input Data
Input Data
Input Data (Least Significant
Bit)
No Internal Connection
Analog Ground
No External Connection*
RSET Resistor Connection
No External Connection*
Analog Supply Voltage
Pin # Pin Name
29
IOUTB
30
IOUT
32
PLL GND
33
PLL FILTER
34
PLL SUPPLY
35
CA ENABLE
36
CA DATA
37
CA CLK
38
CS
39
SDO
40
SDIO
41
SCLK
42
SYNC I/O
45
PS0
46
PS1
47
REFCLK
48
RESET
Pin Function
Complementary Analog
Current Output of the DAC
True Analog Current Output
of DAC
PLL Ground
PLL Loop Filter Connection
PLL Voltage Supply
Cable Driver Amp Enable
Cable Driver Amp Data
Cable Driver Amp Clock
Chip Select
Serial Data Output
Serial Port I/O
Serial Port Clock
Performs I/O Synchronization
Profile Select 0
Profile Select 1
Reference Clock Input
Master Reset
*In most cases optimal performance is achieved with no external connection. For extremely noisy environments BG REF BYPASS can be bypassed with up to a
0.1 µF capacitor to AGND (Pin 23). DAC REF BYPASS can be bypassed with up to a 0.1 µF capacitor to AVDD (Pin 27).
PIN CONFIGURATION
48 47 46 45 44 43 42 41 40 39 38 37
TxENABLE 1
D11 2
D10 3
DVDD 4
DGND 5
D9 6
D8 7
D7 8
D6 9
DVDD 10
DGND 11
D5 12
PIN 1
IDENTIFIER
AD9856
TOP VIEW
(Not to Scale)
13 14 15 16 17 18 19 20 21 22 23 24
NC = NO CONNECT
36 CA DATA
35 CA ENABLE
34 PLL SUPPLY
33 PLL FILTER
32 PLL GND
31 AGND
30 IOUT
29 IOUTB
28 AGND
27 AVDD
26 DAC REF BYPASS
25 DAC RSET
–4–
REV. B
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