AD9857 データシートの表示（PDF） - Analog Devices

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AD9857

CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter

Analog Devices 

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

AD9857

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

D13 1

D12 2

D11 3

D10 4

D9 5

D8 6

D7 7

DVDD 8

DVDD 9

DVDD 10

DGND 11

DGND 12

DGND 13

D6 14

D5 15

D4 16

D3 17

D2 18

D1 19

D0 20

PIN 1

INDICATOR

AD9857

TOP VIEW

(Not to Scale)

60 DIFFCLKEN

59 AGND

58 AVDD

57 NC

56 AGND

55 PLL_FILTER

54 AVDD

53 AGND

52 NC

51 NC

50 DAC_RSET

49 DAC_BP

48 AVDD

47 AGND

46 IOUT

45 IOUT

44 AGND

43 AVDD

42 AGND

41 NC

21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

NC = NO CONNECT

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions

Pin Number Mnemonic I/O

20–14, 7–1

D0–D6, D7– I

D13

8–10, 31–33,

73–75

DVDD

11–13, 28–30, DGND

70–72, 76–78

21

PS1

I

22

PS0

I

23

CS

I

24

SCLK

I

25

SDIO

I/O

26

SDO

O

27

SYNCIO

I

34, 41, 51, 52, NC

57

Function

14-Bit Parallel Data Bus for I and Q Data. The required numeric format is twos complement with D13

as the sign bit and D12–D0 as the magnitude bits. Alternating 14-bit words are demultiplexed onto

the I and Q data pathways (except when operating in the interpolating DAC mode, in which case

every word is routed onto the I data path). When the TxENABLE pin is asserted high, the next

accepted word is presumed to be I data, the next Q data, and so forth.

3.3 V Digital Power pin(s).

Digital Ground pin(s).

Profile Select Pin 1. The LSB of the two profile select pins. In conjunction with PS0, selects one of four

profile configurations.

Profile Select Pin 0. The MSB of the two profile select pins. In conjunction with P1, selects one of four

profile configurations.

Serial Port Chip Select pin. An active low signal that allows multiple devices to operate on a single

serial bus.

Serial Port Data Clock pin. The serial data CLOCK for the serial port.

Serial Port Input/Output Data pin. Bidirectional serial DATA pin for the serial port. This pin can be

programmed to operate as a serial input only pin, via the control register bit 00h<7>. The default

state is bidirectional.

Serial Port Output Data pin. This pin serves as the serial data output pin when the SDIO pin is

configured for serial input only mode. The default state is three-state.

Serial Port Synchronization pin. Synchronizes the serial port without affecting the programmable

register contents. This is an active high input that aborts the current serial communication cycle.

No connect.

Rev. C| Page 9 of 40

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