HI5813(2001) データシートの表示（PDF） - Intersil

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HI5813
(Rev.:2001)

CMOS 3.3V, 30 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold

Intersil 

HI5813

Electrical Specifications

VDD = VAA+ = VREF+ = 3.3V, VSS = VAA- = VREF- = GND, CLK = 500kHz,

Unless Otherwise Specified (Continued)

25oC

-40oC TO 85oC

PARAMETER

TEST CONDITIONS

MIN TYP MAX

MIN

MAX

Input Leakage Current, IIL

Input Capacitance, CIN

DIGITAL OUTPUTS

Except CLK, VIN = 0V, 5V

-

-

±10

-

±10

-

10

-

-

-

High-Level Output Voltage, VOH

Low-Level Output Voltage, VOL

Three-State Leakage, IOZ

ISOURCE = -400µA

2.6

-

-

2.6

-

ISINK = 1.6mA

-

-

0.4

-

0.4

Except DRDY, VOUT = 0V,

-

-

±10

-

±10

3.3V

Output Capacitance, COUT

TIMING

Except DRDY

-

20

-

-

-

Conversion Time (tCONV + tACQ)

(Includes Acquisition Time)

30

-

-

30

-

Clock Frequency

(Note 2)

0.05

-

0.75

0.05

0.75

Clock Pulse Width, tLOW, tHIGH

Aperture Delay, tDAPR

Clock to Data Ready Delay, tD1DRDY

Clock to Data Ready Delay, tD2DRDY

Start Removal Time, tRSTRT

Start Setup Time, tSUSTRT

Start Pulse Width, tWSTRT

Start to Data Ready Delay, tD3 DRDY

Output Enable Delay, tEN

Output Disabled Delay, tDIS

POWER SUPPLY CHARACTERISTICS

(Note 2)

(Note 2)

(Note 2)

(Note 2)

(Note 2)

(Note 2)

(Note 2)

(Note 2)

(Note 2)

(Note 2)

100

-

-

100

-

-

35

50

-

70

-

180 210

-

240

-

180 220

-

250

75

30

-

75

-

85

60

-

30

-

-

15

25

-

25

-

110 130

-

160

-

65

75

-

80

-

95

110

-

130

Supply Current, IDD + IAA

-

0.5

1

-

2.5

NOTE:

2. Parameter guaranteed by design or characterization, not production tested.

UNITS

µA

pF

V

V

µA

pF

µs

MHz

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

mA

4

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