PRELIMINARY
AMD
Initialization
Block
Transmit Descriptor for 1st Data Buffer
Transmit Descriptor for 2nd Data Buffer
Transmit Descriptor for 3rd Data Buffer
Transmit Descriptor for Nth Data Buffer
Transmit
Descriptor
Ring
(4 words
per entry)
Receive Descriptor for 1st Data Buffer
Receive Descriptor for 2nd Data Buffer
Receive Descriptor for 3rd Data Buffer
Receive Descriptor for Nth Data Buffer
Receive
Descriptor
Ring
(4 words
per entry)
Transmit Data Buffer #1
Transmit Data Buffer #2
Transmit Data Buffer #3
Transmit
Data
Buffers
Transmit Data Buffer #N
Receive Data Buffer #1
Receive Data Buffer #2
Receive Data Buffer #3
Receive
Data
Buffers
Receive Data Buffer #N
Figure 2-1. C-LANCE/Processor Memory Interface
17881B-7
Am79C90
11