TNY255G データシートの表示（PDF） - Power Integrations, Inc

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TNY255G

Energy Effcient, Low Power Off-line Switchers

Power Integrations, Inc 

TNY253/254/255

BYPASS

50 μA

OSCILLATOR

CLOCK

DCMAX

REGULATOR

5.8 V

5.8 V

5.1 V

UNDERVOLTAGE

+

-

THERMAL

SHUTDOWN

DRAIN

VILIMIT

S

Q

ENABLE

1.5 V + VTH

R

Q

LEADING

EDGE

BLANKING

SOURCE

Figure 2. Functional Block Diagram.

Pin Functional Description

DRAIN (D) Pin:

Power MOSFET drain connection. Provides internal operating

current for both start-up and steady-state operation.

BYPASS (BP) Pin:

Connection point for an external bypass capacitor for the inter-

nally generated 5.8 V supply. Bypass pin is not intended for

sourcing supply current to external circuitry.

ENABLE (EN) Pin:

The power MOSFET switching can be terminated by pulling

this pin low. The I-V characteristic of this pin is equivalent to

a voltage source of approximately 1.5 V with a source current

clamp of 50 µA.

SOURCE (S) Pin:

Power MOSFET source connection. Primary return.

TinySwitch Functional Description

TinySwitch is intended for low power off-line applications. It

combines a high-voltage power MOSFET switch with a power

supply controller in one device. Unlike a conventional PWM

(Pulse Width Modulator) controller, the TinySwitch uses a

simple ON/OFF control to regulate the output voltage.

The TinySwitch controller consists of an Oscillator, Enable

(Sense and Logic) circuit, 5.8 V Regulator, Undervoltage circuit,

PI-2197-061898

BYPASS 1

8 SOURCE

SOURCE 2

7 SOURCE

SOURCE 3

6 SOURCE

ENABLE 4

5 DRAIN

P Package (DIP-8)

G Package (SMD-8)

PI-2199-031501

Figure 3. Pin Configuration.

Hysteretic Over Temperature Protection, Current Limit circuit,

Leading Edge Blanking, and a 700 V power MOSFET. Figure

2 shows a functional block diagram with the most important

features.

Oscillator

The oscillator frequency is internally set at 44 kHz (130 kHz

for the TNY255). The two signals of interest are the Maxi-

mum Duty Cycle signal (DMAX) which runs at typically 67%

duty cycle and the Clock signal that indicates the beginning of

each cycle. When cycles are skipped (see below), the oscilla-

tor frequency doubles (except for TNY255 which remains at

130 kHz). This increases the sampling rate at the ENABLE

pin for faster loop response.

Enable (Sense and Logic)

The ENABLE pin circuit has a source follower input stage set

at 1.5 V. The input current is clamped by a current source set

at 50 µA with 10 µA hysteresis. The output of the enable sense

2

Rev E

02/12

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