AD7869(RevB) データシートの表示（PDF） - Analog Devices
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AD7869 Datasheet PDF : 16 Pages
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AD7869
500
TA = +25°C
VDD = +5V
200
VSS = –5V
100
REF OUT
50
OUTPUT WITH
ALL 0s LOADED
REF OUT DECOUPLED
20
AS SHOWN IN
FIGURE 2
10
50
100 200
1k 2k
10k 20k
FREQUENCY – Hz
100k
Figure 3. Noise Spectral Density vs. Frequency
INPUT/OUTPUT TRANSFER FUNCTIONS
A bipolar circuit for the AD7869 is shown in Figure 4.
The analog input/output voltage range of the AD7869 is ± 3 V.
The designed code transitions for the ADC occur midway be-
tween successive integer LSB values (i.e., 1/2 LSB, 3/2 LSB,
5/2 LSB . . . FS –3/2 LSBs). The input/output code is 2s
Complement Binary with 1 LSB = FS/16384 = 366 µV. The
ideal transfer function is shown in Figure 5.
ANALOG INPUT
RANGE = ±3V
C1
10µF
R1
200
C2
0.1µF
AD7869*
VIN
VOUT
ANALOG OUTPUT
RANGE = ±3V
RI DAC
RO ADC
AGND
*ADDITIONAL PINS OMITTED FOR CLARITY
Figure 4. Basic Bipolar Operation
OUTPUT
CODE
011...111
011...110
000...010
000...001
-FS
2
000...000
111...111
111...110
100...001
100...000
+ FS
-1LSB
2
FS = 6V
FS
1LSB =
16384
0V
INPUT VOLTAGE
Figure 5. Input/Output Transfer Function
OFFSET AND FULL SCALE ADJUSTMENT
In most digital signal processing (DSP) applications, offset and
full-scale errors have little or no effect on system performance.
Offset error can always be eliminated in the analog domain by
ac coupling. Full-scale errors do not cause problems as long as
the input signal is within the full dynamic range of the ADC.
For applications requiring that the input signal range match the
full analog input dynamic range of the ADC, offset and full-
scale errors have to be adjusted to zero.
ADC ADJUSTMENT
Figure 6 has signal conditioning at the input and output of the
AD7869 for trimming the endpoints of the transfer functions of
both the ADC and the DAC. Offset error must be adjusted be-
fore full-scale error. For the ADC, this is achieved by trimming
the offset of A1 while the input voltage, V1, is 1/2 LSB below
ground. The trim procedure is as follows: apply a voltage of
–183 µV (–1/2 LSB) at V1 in Figure 6 and adjust the offset volt-
age of A1 until the ADC output code flickers between 11 1111
1111 1111 (3FFF HEX) and 00 0000 0000 0000 (0000 HEX).
V1
INPUT VOLTAGE
RANGE = ±3V
R1
10k
R2
500
R3
10k
R5
10k
A1
R4
10k
*ADDITIONAL PINS
OMITTED FOR
CLARITY
VIN VOUT
R6
AD7869* 10k
AGND
R7
500
R8
10k
R10
10k
V0
OUTPUT VOLTAGE
RANGE = ± 3V
A2
R9
10k
Figure 6. AD7869 with Input/Output Adjustment
ADC gain error can be adjusted at either the first code transi-
tion (ADC negative full scale) or the last code transition (ADC
positive full scale). The trim procedures for both cases are as
follows (see Figure 6).
ADC Positive Full-Scale Adjustment
Apply a voltage of 2.99945 V (FS/2 – 3/2 LSBs) at V1. Adjust
R2 until the ADC output code flickers between 01 1111 1111
1110 (1FFE HEX) and 01 1111 1111 1111 (1FFF HEX).
ADC Negative Full-Scale Adjustment
Apply a voltage of –2.99982 V (–FS/2 + 1/2 LSB) at V1 and ad-
just R2 until the ADC output code flickers between 10 0000
0000 0000 (2000 HEX) and 10 0000 0000 0001 (2001 HEX).
DAC ADJUSTMENT
Op amp A2 is included in Figure 6 for the DAC transfer func-
tion adjustment. Again, offset must be adjusted before full scale.
To adjust offset, load the DAC with 00 0000 0000 0000 (0000
HEX) and trim the offset of A2 to 0 V. As with the ADC adjust-
ment, gain error can be adjusted at either the first code transi-
tion (DAC negative full scale) or the last code transition (DAC
positive full scale). The trim procedures for both cases are as
follows:
DAC Positive Full-Scale Adjustment
Load the DAC with 01 1111 1111 1111 (1FFF HEX) and ad-
just R7 until the op amp output voltage is equal to 2.99963 V
(FS/2 – 1 LSB).
DAC Negative Full-Scale Adjustment
Load the DAC with 10 0000 0000 0000 (2000 HEX) and adjust
R7 until the op amp output voltage is equal to –3 V (–FS/2).
REV. B
–7–
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