AD7226 データシートの表示（PDF） - Analog Devices
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AD7226 Datasheet PDF : 16 Pages
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AD7226
PIN CONFIGURATIONS
DIP and SOIC/SSOP
VOUTB 1
VOUTA 2
VSS 3
20 VOUTC
19 VOUTD
18 VDD
VREF 4
17 A0
AGND 5 AD7226 16 A1
DGND 6 TOP VIEW 15 WR
(Not to Scale)
DB7 (MSB) 7
14 DB0(LSB)
DB6 8
13 DB1
DB5 9
12 DB2
DB4 10
11 DB3
PLCC
V REF 4
AGND 5
DGND 6
DB7 (MSB) 7
DB8 8
3 2 1 20 19
AD7226
TOP VIEW
(Not to Scale)
18 VDD
17 A0
16 A1
15 WR
14 DB0(LSB)
9 10 11 12 13
TERMINOLOGY
TOTAL UNADJUSTED ERROR
This is a comprehensive specification that includes full-scale
error, relative accuracy and zero code error. Maximum output
voltage is VREF – 1 LSB (ideal), where 1 LSB (ideal) is VREF/
256. The LSB size will vary over the VREF range. Hence the zero
code error will, relative to the LSB size, increase as VREF decreases.
Accordingly, the total unadjusted error, which includes the zero
code error, will also vary in terms of LSB’s over the VREF range.
As a result, total unadjusted error is specified for a fixed refer-
ence voltage of 10 V.
RELATIVE ACCURACY
Relative Accuracy or endpoint nonlinearity, is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
allowing for zero and full-scale error and is normally expressed
in LSB’s or as a percentage of full-scale reading.
DIFFERENTIAL NONLINEARITY
Differential Nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ± 1 LSB max over
the operating temperature range ensures monotonicity.
DIGITAL CROSSTALK
The glitch impulse transferred to the output of one converter
due to a change in the digital input code to another of the con-
verters. It is specified in nV secs and is measured at VREF = 0 V.
FULL SCALE ERROR
Full-Scale Error is defined as:
Measured Value – Zero Code Error – Ideal Value
–4–
REV. D
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