AT80C51RA2-3CSCV データシートの表示（PDF） - Atmel Corporation
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AT80C51RA2-3CSCV Datasheet PDF : 86 Pages
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facilitates multiprocessor communication (EUART) and an X2 speed improvement mechanism.
The fully static design of the TS80C51Rx2 allows to reduce system power consumption by
bringing the clock frequency down to any value, even DC, without loss of data.
The TS80C51Rx2 has 2 software-selectable modes of reduced activity for further reduction in
power consumption. In the idle mode the CPU is frozen while the timers, the serial port and the
interrupt system are still operating. In the power-down mode the RAM is saved and all other
functions are inoperative.
PDIL40
PLCC44
TOTAL RAM
VQFP44 1.4
ROM (bytes)
EPROM (bytes)
XRAM (bytes)
(bytes)
I/O
TS80C51RA2
0
TS80C51RD2
0
0
256
512
32
0
768
1024
32
TS83C51RB2
16k
0
256
512
32
TS83C51RC2
32k
0
256
512
32
TS83C51RD2
64k
0
768
1024
32
TS87C51RB2
0
TS87C51RC2
0
TS87C51RD2
0
16k
256
512
32
32k
256
512
32
64k
768
1024
32
PLCC68
TOTAL RAM
VQFP64 1.4
ROM (bytes)
EPROM (bytes)
XRAM (bytes)
(bytes)
I/O
TS80C51RD2
0
0
768
1024
48
TS83C51RD2
64k
0
768
1024
48
TS87C51RD2
0
64k
768
1024
48
2 AT/TS8xC51Rx2
4188F–8051–01/08
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