UBA1706 データシートの表示（PDF） - Philips Electronics

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UBA1706

Cordless telephone line interface

Philips Electronics 

Philips Semiconductors

Cordless telephone line interface

Objective specification

UBA1706

The DC line current flowing into the set is determined by

the exchange supply voltage (Vexch), the feeding bridge

resistance (Rexch), the DC resistors of the telephone line

(Rline) and the set (RSET), the reference voltage (Vref) and

the voltage introduced by the transistor (TNSW) used as

line interrupter (see Fig.5).

With a line current below Ilow (8 mA with ZSET = 619 Ω), the

internal reference voltage (Vref) is automatically adjusted

to a lower value. This means that several sets can operate

in parallel with DC line voltages (excluding the polarity

guard) down to 1.2 V. With a line current below Ilow, the

circuit has limited transmit and receive levels. This is called

the low voltage area.

Figure 6 shows in more detail how the UBA1706, in

association with some external components, manages the

line interrupter (TNSW external transistor).

In on-hook conditions (voltage at pin EHI is LOW), the

voltage at pin LCC is pulled up to the supply voltage level

(VCC) to turn off transistor TPDARL. As a result, because of

resistor RPD, transistors TNSW and TNON-HOOK are

switched off. Transistor TNON-HOOK disconnects resistor

RLVI from the LN− line terminal to guarantee a high

on-hook impedance.

In off-hook conditions (voltage at pin EHI is HIGH), an

operational amplifier drives (at pin LCC) the base of

transistor TPDARL, which forms a current amplifier

structure in association with TNSW. The line current flows

through transistor TNSW. Transistor TNON-HOOK is forced

into deep saturation. A virtual ground is created at pin LVI

because of the operational amplifier. A DC current (ILVI) is

sourced from pin LVI into the RLVI resistor to generate a

voltage source. Thus, the voltage across pins GND and

LN− becomes:

VCE (TNSW) = RLVI × ILVI + VCE (TNON-HOOK) ≅ RLVI × ILVI

The voltage Vline across line terminals LN+ and LN− can

be calculated as follows:

Vline ≅ Vref + RSLPE × (Iline − IZSET) + VCE (TNSW)

Where:

Iline = line current

IZSET = current flowing through ZSET.

1999 Jun 04

8

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