AT6000 データシートの表示（PDF） - Atmel Corporation

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AT6000

Coprocessor Field Programmable Gate Arrays

Atmel Corporation 

Each cell, in addition, provides the ability to route a signal

on a 90° turn between the NS1 bus and EW1 bus and

between the NS2 bus and EW2 bus.

Express buses are not connected directly to cells, and thus

provide higher speeds. They are the fastest way to cover

long, straight-line distances within the array.

Each express bus is paired with a local bus, so there are

two express buses for every column and two express

buses for every row of cells.

Connective units, called repeaters, spaced every eight

cells, divide each bus, both local and express, into

segments spanning eight cells. Repeaters are aligned in

rows and columns thereby partitioning the array into 8 x 8

sectors of cells. Each repeater is associated with a

local/express pair, and on each side of the repeater are

connections to a local-bus segment and an express-bus

segment. The repeater can be programmed to provide any

one of twenty-one connecting functions. These functions

are symmetric with respect to both the two repeater sides

and the two types of buses.

Among the functions provided are the ability to:

• Isolate bus segments from one another

• Connect two local-bus segments

• Connect two express-bus segments

• Implement a local/express transfer

In all of these cases, each connection provides signal

regeneration and is thus unidirectional. For bidirectional

connections, the basic repeater function for the NS2 and

EW2 repeaters is augmented with a special programmable

connection allowing bidirectional communication between

local-bus segments. This option is primarily used to imple-

ment long, tristate buses.

The Cell Structure

The Atmel cell (Figure 4) is simple and small and yet

can be programmed to perform all the logic and wiring

functions needed to implement any digital circuit. Its four

sides are functionally identical, so each cell is completely

symmetrical.

Read/write access to the four local buses – NS1, EW1,

NS2 and EW2 – is controlled, in part, by four bidirectional

pass gates connected directly to the buses. To read a local

bus, the pass gate for that bus is turned on and the three-

input multiplexer is set accordingly. To write to a local bus,

the pass gate for that bus and the pass gate for the associ-

ated tristate driver are both turned on. The two-input

multiplexer supplying the control signal to the drivers per-

mits either: (1) active drive, or (2) dynamic tristating

controlled by the B input. Turning between LNS1 and LEW1 or

between LNS2 and LEW2 is accomplished by turning on the

two associated pass gates. The operations of reading, writ-

ing and turning are subject to the restriction that each bus

can be involved in no more than a single operation.

Figure 4. Cell Structure

4

AT6000(LV) Series

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