UDA1361TS データシートの表示（PDF） - Philips Electronics
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UDA1361TS Datasheet PDF : 20 Pages
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Philips Semiconductors
96 kHz sampling 24-bit stereo audio ADC
Product specification
UDA1361TS
BLOCK DIAGRAM
handbook, full pagewidth
VDDA VSSA VRP
VRN
Vref
SYSCLK
16
15
5
4
2
8
9
VDDD
UDA1361TS
10
VSSD
VINL
1
ADC
Σ∆
3
VINR
DECIMATION
CLOCK
14
MSSEL
FILTER
CONTROL
7
PWON
ADC
Σ∆
DATAO
13
11
BCK
WS
12
DIGITAL
INTERFACE
DC-CANCELLATION
FILTER
6
SFOR
Fig.1 Block diagram.
MGT451
PINNING
SYMBOL
VINL
Vref
VINR
VRN
VRP
SFOR
PWON
SYSCLK
VDDD
VSSD
BCK
WS
DATAO
MSSEL
VSSA
VDDA
PIN
DESCRIPTION
1 left channel input
2 reference voltage
3 right channel input
4 negative reference voltage
5 positive reference voltage
6 data format selection input
7 power control input
8 system clock 256, 384, 512 or 768fs
9 digital supply voltage
10 digital ground
11 bit clock input/output
12 word select input/output
13 data output
14 master/slave select
15 analog ground
16 analog supply voltage
handbook, halfpage
VINL 1
Vref 2
VINR 3
16 VDDA
15 VSSA
14 MSSEL
VRN 4
13 DATAO
UDA1361TS
VRP 5
12 WS
SFOR 6
11 BCK
PWON 7
10 VSSD
SYSCLK 8
9 VDDD
MGT452
Fig.2 Pin configuration.
2001 Jan 17
4
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