UPB1008K データシートの表示（PDF） - California Eastern Laboratories.
部品番号
コンポーネント説明
メーカー
UPB1008K Datasheet PDF : 10 Pages
| |||
UPB1008K
PIN FUNCTIONS
Pin No.
Symbol
Function and Application
18
GNDbb
Ground pin of CMOS output driver.
19
Qmag
Digitized Q signal. Magnitude bit of 2-bit ADC output.
20
Qsign
Digitized Q signal. Sign bit of 2-bit ADC output
21
Isign
Digitized I signal. Sign bit of 2-bit ADC output.
22
Imag
Digitized I signal. Magnitude bit of 2-bit ADC output.
23
VCCbb
Supply voltage pin of CMOS output driver.
24
DCoffsetIb
DC offset compensation pin for I-bar arm.
A low pass capacitor shunt to Pin 25 is required.
25
DCoffsetI
DC offset compensation pin for I arm.
A low pass capacitor shunt to Pin 24 is required.
26
2IFout-Ib
Differential output pins of quadrature
27
2IFout-I
demodulator I output. Adding a lowpass shunt
capacitor between these pins will define the
IF bandwidth.
28
VCC if
Supply voltage pin of analog portion of the chip.
29
VAGC
Gain control voltage pin of IF amplifier. This voltage
performs reverse control,(i.e., VAGC up → gain down).
If this pin is left open, then it is default at
maximum gain.
30
Typical AGC
Gain Response
0
-15
0.5
1.5 2
VAGC (V)
30
IF-in1
Differential input pins of 1st IF AGC amplifier
31
IF-in2
32
GNDanalog Ground pin of analog portion of the chip.
33
Mixout2
Differential output pins of RF mixer. This is an emitter
34
Mixout1
follower output buffer, provide a 50Ω output load.
Internal Equivalent Circuit
23
r=21.5
r=5k
r=21.5
ESD
19, (20,21,22)
ESD
18
See pin 16 & 17 schematic
See pin 14 & 15 schematic
28
ESD
29
ESD
r=300
To AGC Amp
r=3k
32
28
r=4k
r=2k
r=2k
r=4k
Regulator
ESD
30
ESD
r=4k
r=1.42k
r=4k
r=1.42k
32
ESD
31
ESD
Regulator
7
c=1.67p
c=1.67p
r=111
r=111
4
ESD
ESD
ESD
34
33
ESD
Share Link: 