UPC1857A データシートの表示（PDF） - NEC => Renesas Technology
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UPC1857A Datasheet PDF : 44 Pages
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PIN CONFIGURATION (Top View)
30-pin plastic shrink DIP (400 mil)
AGND
1
FC1
2
FC2
3
FC3
4
FC4
5
LF2
6
RTC
7
RBC
8
LTC
9
LBC
10
OFR1
11
OFR2
12
Rout
13
Lout
14
VCC
15
1
2
VCC
ADS
AGND
BAL-C
DGND
FC1-FC4
LBC
LF1, LF2
Lin
Lout
LTC
MFI
: Reference Voltage Filter
: Slave Address Select
: Analog Ground
: Balance Control Offset Absorption
: Ground for I2C Bus
: Phase Shift Filter
: L-channel Bass Capacitor
: Low-pass Filter
: L-channel Signal Input
: L-channel Signal Output
: L-channel Treble Capacitor
: Monaural Filter Input
µPC1857A
30
MFI
29
MFO
28
LF1
27
Rin
26
Lin
25
MIX
24
1
2
VCC
23
DGND
22
ADS
21
SDA
20
SCL
19
OFL1
18
OFL2
17
VOL-C
16
BAL-C
MFO
MIX
OFL1, OFL2
OFR1, OFR2
RBC
Rin
Rout
RTC
SCL
SDA
VCC
VOL-C
: Monaural Filter Output
: Mixer Input
: L-channel Offset Absorption
: R-channel Offset Absorption
: R-channel Bass Capacitor
: R-channel Signal Input
: R-channel Signal Output
: R-channel Treble Capacitor
: Serial Clock for I2C Bus
: Serial Data for I2C Bus
: Power Supply
: Volume Control Offset Absorption
5
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