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UPC4084C データシートの表示(PDF) - NEC => Renesas Technology

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UPC4084C
NEC
NEC => Renesas Technology NEC
UPC4084C Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC4084
J-FET INPUT QUAD OPERATIONAL AMPLIFIER
DESCRIPTION
The µPC4084, is a quad operational amplifier incorporating well matched ion implant P-channel J-FET on the same chip
with standard bipolar transistors. The key features of this op amp is very low input bias current and high slew rate ten
times faster than conventional general purpose op amps. By these features µPC4084, is excellent choice for wide variety
of applications including integrator, active filter, pulse amp etc.
FEATURES
Low noise: en = 25 nV/ Hz (TYP.)
Very low input bias and offset currents
Output short circuit protection
High input impedance...J-FET Input stage
Internal frequency compensation
High slew rate...13 V/µs (TYP.)
ORDERING INFORMATION
Part Number
µPC4084C
Package
14-pin plastic DIP (7.62 mm (300))
EQUIVALENT CIRCUIT
V+
R1
Q5
Q9
Q14
Q12
II
Q1 Q2
Q8
R8
Q16
IN
Q10
R6
C1
R9
R10
Q6
Q13 Q15
D1
Q7
OUT
Q3
Q4
R2 R3 R4
R5
Q11
R11
D2
R7
V
PIN CONFIGURATION (Top View)
µ PC4084C
OUT A 1
14 OUT4
1
4
II1 2 − +
13 II4
IN1 3
12 IN4
V+ 4
11 V
IN2 5
10 IN3
−+
II2 6
2
3
9 II3
OUT2 7
8 OUT3
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G15377EJ3V0DS00 (3rd edition)
(Previous No. IC-1987)
Date Published March 2001 NS CP(K)
Printed in Japan
The mark 5 shows major revised points.
1987

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