UPC4558G2-T1 データシートの表示（PDF） - NEC => Renesas Technology
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UPC4558G2-T1 Datasheet PDF : 11 Pages
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µPC4558
µPC4558C, µPC4558G2
ELECTRICAL CHARACTERISTICS (TA = 25°C, V± = ±15 V)
Parameter
Symbol
Conditions
Input Offset Voltage
Input Offset Current Note
Input Bias Current Note
Large Signal Voltage Gain
Power Consumption
Common Mode Rejection Ratio
Source Variation Rejection Ratio
Output Voltage Swing
VIO
IIO
IB
AV
Pd
CMR
SVR
Vom
RS ≤ 10 Ω
RL ≥ 2 kΩ , VO = ±10 V
IO = 0 A
RS ≤ 10 kΩ
RS ≤ 10 kΩ
RL ≥ 10 kΩ
RL ≥ 2 kΩ
Common Mode Input Voltage Range
VICM
Slew Rate
SR
AV = 1
Input Equivalent Noise Voltage
Vn
RS = 1 kΩ, f = 1 Hz to 1 kHz
(Figure1)
Channel Separation
f = 1 kHz (Figure2)
MIN.
20,000
70
±12
±10
±12
TYP.
±0.5
±5
60
100,000
90
90
30
±14
±13
±14
1.0
6
105
MAX.
±6.0
±200
500
170
150
Unit
mV
nA
nA
mW
dB
µV/V
V
V
V
V/µs
µVp-p
dB
Note Input bias currents flow out from IC, because each currents are base current of PNP-transistor on input stage.
When using these ICs, pay careful attention to the following points.
1. The total of the internal power dissipation, when the loads of both channels are short-circuited at the same time.
2. The likelihood of interference between the channels, due to the temperature gradient of the chip, when the internal
power dissipation of the left and right channels differ greatly in circuits handling low level inputs.
µPC4558G2 (5)
ELECTRICAL CHARACTERISTICS (TA = 25°C, V± = ±15 V)
Parameter
Symbol
Conditions
Input Offset Voltage
Input Offset Current Note
Input Bias Current Note
VIO
RS ≤ 10 Ω
IIO
IB
Large Signal Voltage Gain
AV
RL ≥ 2 kΩ , VO = ±10 V
Power Consumption
Pd
IO = 0 A
Common Mode Rejection Ratio
CMR
RS ≤ 10 kΩ
Source Variation Rejection Ratio
SVR
RS ≤ 10 kΩ
Output Voltage Swing
Vom
RL ≥ 10 kΩ
RL ≥ 2 kΩ
Common Mode Input Voltage Range
VICM
Slew Rate
SR
AV = 1
Input Equivalent Noise Voltage
Vn
RS = 1 kΩ, f = 1 Hz to 1 kHz
(Figure1)
Channel Separation
f = 1 kHz (Figure2)
MIN.
50,000
85
±12.5
±11
±13
TYP.
±0.5
±5
60
100,000
90
90
30
±14
±13
±14
1.0
6
105
MAX.
±2.0
±50
100
135
75
Unit
mV
nA
nA
mW
dB
µV/V
V
V
V
V/µs
µVp-p
dB
Note Input bias currents flow out from IC, because each currents are base current of PNP-transistor on input stage.
When using these ICs, pay careful attention to the following points.
1. The total of the internal power dissipation, when the loads of both channels are short-circuited at the same time.
2. The likelihood of interference between the channels, due to the temperature gradient of the chip, when the internal
power dissipation of the left and right channels differ greatly in circuits handling low level inputs.
Data Sheet G10518EJAV0DS
3
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