UPC8126K-E1 データシートの表示（PDF） - NEC => Renesas Technology

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UPC8126K-E1

900 MHz BAND DIRECT QUADRATURE MODULATOR IC FOR DIGITAL MOBILE COMMUNICATION SYSTEMS

NEC => Renesas Technology 

µPC8126K

Supply Pin

Pin

Symbol Voltage Voltage (V)

No.

(V)

@3 V

Description

Equivalent Circuit

12

Qb

VCC/2

–

Input for Q signal.

This input impedance is 180 kΩ.

In case of that I/Q input signals are

single ended, VCC/2 biased DC

signal should be input.

In case of that I/Q input signals are

differential, amplitude of the signal is

250 mVP-P max.

Note

12

13

13

Q

VCC/2

–

Input for Q signal.

This input impedance is 180 kΩ.

In case of that I/Q input signals are

single ended, amplitude of the signal

is 500 mVP-P max.

Note

14

GND

0

(Modulator)

–

Ground pin for the modulator.

Connect to the ground with minimum

inductance.

Track length should be kept as short

as possible.

–––––––––––––

16

VCC3

2.7 to 3.6

–

Supply voltage pin for the output

buffer amplifier of modulator.

An internal regulator helps keep the

device stable against temperature or

VCC variation.

–––––––––––––

17 MODout

–

1.6

Output pin from the modulator.

This is emitter follower output.

So this output impedance is low.

17

19

GND

0

(Modulator)

20

VPS2

VPS

(Pre-Mix)

–

Ground pin for the modulator.

Connect to the ground with minimum

inductance.

Track length should be kept as short

as possible.

–

Power save control pin can control

the On/Sleep state with bias as

follows.

VPS (V)

State

2.2 to 3.6 ON (Active Mode)

0 to 0.5 OFF (Sleep Mode)

–––––––––––––

20

Note Relations between amplitude and VCC/2 bias of input signal are following.

Preliminary Data Sheet P13488EJ1V0DS00

9

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