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UPD16676P データシートの表示(PDF) - NEC => Renesas Technology

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UPD16676P
NEC
NEC => Renesas Technology NEC
UPD16676P Datasheet PDF : 20 Pages
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µPD16676
5. PIN DESCRIPTIONS
5.1 Power System
Pin Symbol
Pin Name
VDD
Power supply pin
VSS
Ground
VLC1 to VLC5
Reference power supply for
drivers
Pin No.
87
78
90,91,92,
94,95
I/O
Function Description
Power supply
Ground
Reference power supply for LCD driving
5.2 Logic system
Pin Symbol
Pin Name
M,/S
Master/Slave selection
FR
LCD to AC signal
DB0 to DB7 Data Bus
A0
Data/Instruction Switching
/RESET
Reset and 68/80-series
switching
E(/RD)
Enable and read enable
R,/W(/WR)
OSC1
Read/Write and Write
enable
Oscillation pin
OSC2
Oscillation pin
Pin No.
93
89
79 to 86
73
88
76
77
74
75
I/O
Input
Input/
Output
Input/
Output
Input
Input
Input
Input
Input
Output
Function Description
Switches between the master chip and the slave
chip.
Exchanges synchronizing signals (LCD-to-AC
signals) in connecting cascades.
This pin is for output if the chip is the master, and for
input if the chip is the slave.
Data inputs/outputs
This pin is used for switching between the display
data and the instruction.
High level : Display data
Low level : Instruction
This pin performs reset at the edge of the low-level
pulse. At that level, it performs switching 68/80
series modes.
High level : 68 series MPU interface
Low level : 80 series MPU interface
68 series mode : Enable signal
80 series mode : Read enable signal
68 series mode : Read/Write signal
80 series mode : Write enable signal
Oscillation (connected with a register between
OSC2)
Oscillation (connected with a register between
OSC1)
5.3 Driver System
Pin Symbol
Pin Name
SEG0 to
SEG60
COM0 to
COM15
Segment
Common
Pin No.
72 to 12
I/O
Output
Description
Segment output pins
96 to 100,
1 to 11
Output
Common output pins
If the chip is a slave, these pins correspond to
COM16 to COM31.
6
Data Sheet S10561EJ5V0DS00

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