UPD17717 データシートの表示（PDF） - NEC => Renesas Technology
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UPD17717
NEC => Renesas Technology
UPD17717 Datasheet PDF : 408 Pages
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µPD17717, 17718, 17719
13. TIMERS ............................................................................................................................................ 146
13.1 Outline of Timers ................................................................................................................. 146
13.2 Basic Timer 0 ....................................................................................................................... 148
13.3 Timer 0 .................................................................................................................................. 161
13.4 Timer 1 .................................................................................................................................. 170
13.5 Timer 2 .................................................................................................................................. 177
13.6 Timer 3 .................................................................................................................................. 184
14. A/D CONVERTER ............................................................................................................................ 191
14.1 Outline of A/D Converter ..................................................................................................... 191
14.2 Input Selection Block .......................................................................................................... 192
14.3 Compare Voltage Generation and Compare Blocks ........................................................ 194
14.4 Comparison Timing Chart ................................................................................................... 197
14.5 Using A/D Converter ............................................................................................................ 198
14.6 Cautions on Using A/D Converter ...................................................................................... 199
14.7 Status at Reset ..................................................................................................................... 199
15. D/A CONVERTER (PWM mode) ..................................................................................................... 200
15.1 Outline of D/A Converter ..................................................................................................... 200
15.2 PWM Clock Selection Register ........................................................................................... 201
15.3 PWM Output Selection Block ............................................................................................. 202
15.4 Duty Setting Block ............................................................................................................... 205
15.5 Clock Generation Block ...................................................................................................... 209
15.6 D/A Converter Output Wave ............................................................................................... 209
15.7 Example of Using D/A Converter ....................................................................................... 212
15.8 Status at Reset ..................................................................................................................... 213
16. SERIAL INTERFACE ....................................................................................................................... 214
16.1 Outline of Serial Interface ................................................................................................... 214
16.2 Serial Interface 2 .................................................................................................................. 216
16.3 Serial Interface 3 .................................................................................................................. 284
17. PLL FREQUENCY SYNTHESIZER ................................................................................................. 306
17.1 Outline of PLL Frequency Synthesizer .............................................................................. 306
17.2 Input Selection Block and Programmable Divider ........................................................... 307
17.3 Reference Frequency Generator ........................................................................................ 311
17.4 Phase Comparator (φ-DET), Charge Pump, and Unlock FF ............................................. 313
17.5 PLL Disabled Status ............................................................................................................ 317
17.6 Using PLL Frequency Synthesizer ..................................................................................... 318
17.7 Status at Reset ..................................................................................................................... 322
18. FREQUENCY COUNTER ................................................................................................................ 323
18.1 Outline of Frequency Counter ............................................................................................ 323
18.2 Input/Output Selection Block and Gate Time Control Block ........................................... 324
18.3 Start/Stop Control Block and IF Counter ........................................................................... 327
18.4 Using IF Counter .................................................................................................................. 334
18.5 Using External Gate Counter .............................................................................................. 336
18.6 Status at Reset ..................................................................................................................... 337
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