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UPD750068CUA データシートの表示(PDF) - NEC => Renesas Technology

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UPD750068CUA
NEC
NEC => Renesas Technology NEC
UPD750068CUA Datasheet PDF : 82 Pages
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µPD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)
3.2 Non-port Pins (1/2)
Pin Name
TI0
TI1
PTO0
PTO1
PCL
BUZ
SCK
SO
SB0
SI
SB1
INT4
INT0
INT1
INT2
KR0 to KR3
AN0 to AN3
AN4 to AN7
AVREF
AVSS
Input/Output
Alternate
Function
Function
Input
P13
P12/INT2
Inputs external event pulses to the timer/event
counter.
Output
P20
Timer/event counter output
P21
P22
Clock output
P23
Optional frequency output (for buzzer output
or system clock trimming)
Input/Output
P01
Serial clock input/output
Output
P02
Serial data output
Input/Output
Serial data bus input/output
Input
P03
Serial data input
Input/Output
Serial data bus input/output
Input
P00
Edge detection vectored interrupt input (both
rising edge and falling edge detection)
Input
P10
Edge detection vectored Noise elimination
interrupt input (detection circuit/asynchronous
edge can be selected).
selection
P11
INT0/P10 can select noise Asynchronous
elimination circuit.
Input
P12/TI1
Rising edge detection
testable input
Asynchronous
Input
P60/AN4 to Falling edge detection testable input
P63/AN7
Input
P110 to P113 Analog signal input
P60/KR0 to
P63/KR3
A/D converter reference voltage
A/D converter reference GND potential
I/O Circuit
After Reset
TypeNote
Input
<B>-C
Input
E-B
Input
<F>-A
<F>-B
<M>-C
Input
<B>
<B>-C
Input
Input
Input
<B>-C
<Y>-D
Y-A
<Y>-D
Z-N
Z-N
Note Circuit types enclosed in brackets indicate the Schmitt trigger input.
10
Data Sheet U10165EJ2V0DS00

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