UPD750064(A) データシートの表示（PDF） - NEC => Renesas Technology

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UPD750064(A)

4 BIT SINGLE CHIP CMOS MICROCOMPUTERS

NEC => Renesas Technology 

µPD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)

6.7 Timer/Event Counter

The µPD750068 has two channels of timer/event counters. Its configuration is shown in Figures 6-6 and 6-7.

The timer/event counter has the following functions.

(a) Programmable interval timer operation

(b) Square wave output of any frequency to the PTOn pin (n = 0, 1)

(c) Event counter operation

(d) Divides the frequency of signal input via the TIn pin to 1-Nth of the original signal and outputs the divided

frequency to the PTOn pin (frequency divider operation).

(e) Supplies the shift clock to the serial interface circuit.

(f) Reads the count value.

The timer/event counter operates in the following two modes as set by the mode register.

Table 6-2. Operation Modes of Timer/Event Counter

Mode

8-bit timer/event counter mode

16-bit timer/event counter mode

Channel

Channel 0 Channel 1

Yes

Yes

Yes

Data Sheet U10165EJ2V0DS00

29

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