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UPD750066GT データシートの表示(PDF) - NEC => Renesas Technology

部品番号
コンポーネント説明
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UPD750066GT
NEC
NEC => Renesas Technology NEC
UPD750066GT Datasheet PDF : 82 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
µPD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)
Functional Outline
Item
Function
Instruction execution time
• 0.95 µs, 1.91 µs, 3.81 µs, 15.3 µs (@ 4.19-MHz operation with main system clock)
• 0.67 µs, 1.33 µs, 2.67 µs, 10.7 µs (@ 6.0-MHz operation with main system clock)
• 122 µs (@ 32.768-kHz operation with subsystem clock)
On-chip memory
ROM 4096 × 8 bits (µPD750064)
6144 × 8 bits (µPD750066)
8192 × 8 bits (µPD750068)
RAM 512 × 4 bits
General-purpose register
• 4-bit operation: 8 × 4 banks
• 8-bit operation: 4 × 4 banks
Input/
output
port
CMOS input
CMOS input/output
12 On-chip pull-up resistors can be specified by software: 7
Also used for analog input pins: 4
12 On-chip pull-up resistors can be specified by software: 12
Also used for analog input pins: 4
N-ch open-drain
input/output pins
8 13 V withstand voltage
On-chip pull-up resistors can be specified by mask option
Total
32
Timer
4 channels
• 8-bit timer/event counter: 2 channels (can be used as the 16-bit timer/event counter)
• Basic interval timer/watchdog timer: 1 channel
• Watch timer: 1 channel
Serial interface
• 3-wire serial I/O mode ··· MSB or LSB can be selected for transferring first bit
• 2-wire serial I/O mode
A/D converter
8-bit resolution × 8 channels (1.8 V AVREF VDD)
Bit sequential buffer
16 bits
Clock output (PCL)
Φ, 1.05 MHz, 262 kHz, 65.5 kHz (@ 4.19-MHz operation with main system clock)
Φ, 1.5 MHz, 375 kHz, 93.8 kHz (@ 6.0-MHz operation with main system clock)
Buzzer output (BUZ)
• 2 kHz, 4 kHz, 32 kHz (@ 4.19-MHz operation with main system clock or
@ 32.768-kHz operation with subsystem clock)
• 2.93 kHz, 5.86 kHz, 46.9 kHz (@ 6.0-MHz operation with main system clock)
Vectored interrupt
External: 3, Internal: 4
Test input
External: 1, Internal: 1
System clock oscillator
• Ceramic or crystal oscillator for main system clock oscillation
• Crystal oscillator for subsystem clock oscillation
Standby function
STOP/HALT mode
Operating ambient temperature TA = –40 to +85˚C
Power supply voltage
VDD = 1.8 to 5.5 V
Package
• 42-pin plastic shrink DIP (600 mil, 1.778-mm pitch)
• 42-pin plastic shrink SOP (375 mil, 0.8-mm pitch)
Data Sheet U10165EJ2V0DS00
3

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