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UPD750106(A) データシートの表示(PDF) - NEC => Renesas Technology

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UPD750106(A)
NEC
NEC => Renesas Technology NEC
UPD750106(A) Datasheet PDF : 80 Pages
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µPD750104, 750106, 750108, 750104(A), 750106(A), 750108(A)
3.4 Connection of Unused Pins
Table 3-1. Connection of Unused Pins
Pin name
P00/INT4
P01/SCK
P02/SO/SB0
P03/SI/SB1
P10/INT0 - P12/INT2
P13/TI0
P20/PTO0
P21/PTO1
P22/PCL
P23/BUZ
P30 - P33
P40 - P43
P50 - P53
P60/KR0 - P63/KR3
P70/KR4 - P73/KR7
P80, P81
XT1Note
XT2Note
IC
Recommended connection
To be connected to VSS or VDD
To be connected to VSS or VDD through a
separate resistor
To be connected to VSS
To be connected to VSS or VDD
Input state : To be connected to VSS or VDD
through a separate resistor
Output state : To be left open
Input state : To be connected to VSS
Output state : To be connected to VSS
(Do not connect to a pull-up
resistor specified with a mask
option.)
Input state : To be connected to VSS or VDD
through a separate resistor
Output state : To be left open
To be connected to VSS or VDD
To be left open
To be connected directly to VDD
Note When the subsystem clock is not used, set SOS.0 to 1 (not to use the built-
in feedback resistor).
13

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