UPD750104CUA データシートの表示（PDF） - NEC => Renesas Technology
部品番号
コンポーネント説明
メーカー
UPD750104CUA Datasheet PDF : 80 Pages
| |||
µPD750104, 750106, 750108, 750104(A), 750106(A), 750108(A)
3. PIN FUNCTIONS
3.1 Port Pins
Pin name
P00
P01
P02
P03
P10
P11
P12
P13
P20
P21
P22
P23
P30 - P33
P40 - P43Note 2
P50 - P53Note 2
P60
P61
P62
P63
P70
P71
P72
P73
P80
P81
Input/
output
Input
I/O
I/O
I/O
Input
I/O
I/O
Shared
pin
INT4
SCK
SO/SB0
SI/SB1
INT0
INT1
INT2
TI0
PTO0
PTO1
PCL
BUZ
-
I/O
-
I/O
-
I/O KR0
KR1
KR2
KR3
I/O KR4
KR5
KR6
KR7
I/O
-
-
Function
4-bit input port (PORT0).
For P01 - P03, built-in pull-up resistors
can be connected by software in units
of 3 bits.
8-bit
I/O
×
4-bit input port (PORT1).
×
Built-in pull-up resistors can be
connected by software in units of 4 bits.
A noise eliminator can be selected only
when the P10/INT0 pin is used.
4-bit I/O port (PORT2).
×
Built-in pull-up resistors can be
connected by software in units of 4 bits.
When reset
Input
Input
I/O circuit
typeNote 1
B
F -A
F -B
M -C
B -C
Input
E-B
Programmable 4-bit I/O port (PORT3).
×
I/O can be specified bit by bit. Built-in
pull-up resistors can be connected by
software in units of 4 bits.
Input
N-ch open-drain 4-bit I/O port (PORT4).
A pull-up resistor can be provided bit by
bit (mask option). Withstand voltage is
13 V in open-drain mode.
High level (when
pull-up resistors
are provided) or
high impedance
N-ch open-drain 4-bit I/O port (PORT5).
A pull-up resistor can be provided bit by
bit (mask option). Withstand voltage is
13 V in open-drain mode.
High level (when
pull-up resistors
are provided) or
high impedance
Programmable 4-bit I/O port (PORT6).
I/O can be specified bit by bit. Built-in
pull-up resistors can be connected by
software in units of 4 bits.
Input
E-B
M-D
M-D
F -A
4-bit I/O port (PORT7).
Built-in pull-up resistors can be
connected by software in units of 4 bits.
Input
F -A
2-bit I/O port (PORT8).
×
Input
E-B
Built-in pull-up resistors can be
connected by software in units of 2
bits.
Notes 1. The circle ( ) indicates the Schmitt trigger input.
2. When pull-up resistors that can be specified with the mask option are not incorporated (when pins are
used as N-ch open-drain input ports), the input leak low current increases when an input instruction or
bit operation instruction is executed.
9
Share Link: 