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UPD75236GJ データシートの表示(PDF) - NEC => Renesas Technology

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UPD75236GJ
NEC
NEC => Renesas Technology NEC
UPD75236GJ Datasheet PDF : 190 Pages
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µPD75236
3.4 GENERAL REGISTER: 8 × 4 BITS × 4 BANKS
The general registers are mapped at the special addresses of the data memory. There are 4-bank registers,
each bank consisting of eight 4-bit registers (B, C, D, E, H, L, X, A).
The register bank (RB) which becomes valid for instruction is given as
RB = RBE• RBS
(RBS = 0 to 3).
Each general register is operated in 4-bit units. BC, DE, HL and XA form register pairs and are used for 8-bit
manipulation. In addition to DE and HL, DL also makes up a pair and these three pairs can be used as a data
pointer.
The general register area can be accessed by address specification as a normal RAM whether or not it is
used as a register.
Fig. 3-5 General Register Configuraton
Address 3
Data Memory
0
3
000H
A Register
001H
X Register
3
002H
003H
004H
005H
L Register
H Register
E Register
D Register
3
Register Bank 0
3
006H
007H
008H
00FH
010H
017H
018H
01FH
C Register
B Register
Same
Configuration
as Bank 0
Same
Configuration
as Bank 0
Same
Configuration
as Bank 0
Register Bank 1
Register Bank 2
Register Bank 3
Fig. 3-6 Register Pair Configuration
0
3
B
0
C
0
3
D
0
3
H
0
3
X
0
E
0 1 Bank
L
0
A
32

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