UPD75236GJ データシートの表示（PDF） - NEC => Renesas Technology

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UPD75236GJ

4-BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

µPD75236

(4) Memory bank enable flag (MBE)

This is a 1-bit flag to specify the mode to generate the address information of the most significant 4

bits of the 12 bits of the data memory address.

When this flag is set (1), the data memory address space is expanded and all data memory spaces

become addressible.

When this flag is reset (0), the data memory address space is fixed irrespectively of MBS setting. (See

Fig. 2-1 Data Memory Configuration and Addressing Range in Each Addressing Mode.)

When RESET input is applied, the bit 7 contents at address 0 of the program memory are set and the

MBE is automatically initialized.

In vectored interrupt service, the bit 7 contents of the corresponding vector address table are set and

the MBE status in the interrupt service is automatically set.

Normally, set MBE = 0 for interrupt service and use the static RAM of memory bank 0.

(5) Register bank enable flag (RBE)

This is a 1-bit flag to determine whether or not the general register bank configuration should be

expanded.

When this flag is set (1), one general register can be selected from register banks 0 to 3 depending on

the register bank select register (RBS) contents.

When this flag is reset (0), register bank 0 is selected as a general register irrespective of the register

bank select register (RBS) contents.

Upon RESET input, the bit 6 contents at address 0 of the program memory are set and the flag is

automatically initialized.

When a vectored interrupt is generated, the bit 6 contents of the corresponding vector address table

are set and the RBE status in interrupt service is automatically set. Normally, set RBE = 0 for interrupt

service. Use register bank 0 for 4-bit operation and register banks 0 and 1 for 8-bit operation.

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