UPD75237GJ データシートの表示（PDF） - NEC => Renesas Technology

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UPD75237GJ

4-BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

µPD75237

1.2 NON-PORT PINS (2/2)

Pin Name

INT4

I/O

Dual-

Function Pin

Function

After Reset Input / Output

Circuit Type *

Edge-detected vectored interrupt input (valid for detec-

Input

P00

tion of rising and falling edges).

—

B

INT0

INT1

Input

P10

Clocked

Edge-detected vectored interrupt in-

put (detected edge selection possible).

P11

Asynchronous

INT2

Input

Edge-detected testable input (rising edge

P12

detection).

Asynchronous

Input/

SCK1

output

P81

Serial clock input/output.

SO1

SI1

AN0 to AN3

AN4 to AN7

AVDD

AVREF

AVSS

Output

Input

Input

—

Input

—

P82

P83

—

P90 to P93

—

—

—

Serial data output.

Serial data input.

Analog input to A/D converter.

A/D converter power supply.

A/D converter reference voltage input.

A/D converter reference GND potential.

X1, X2

Input

Main system clock oscillation crystal/ceramic connec-

—

tion. An external clock is input to X1 and an antiphase

clock is input to X2.

XT1

XT2

RESET

PPO

VDD (3 – Pin)

VSS (2 – Pin)

Input

—

Input

Output

—

—

VLOAD

—

Subsystem clock oscillation crystal connection. An exter-

—

nal clock is input to XT1 and XT2 is made open.

—

System reset input.

P80

Timer/pulse generator pulse output.

—

Positive power supply.

—

GND potential.

FIP controller/driver pull-down resistor connect/power

—

supply.

—

—

Input

Input

Input

—

—

—

—

—

—

—

Input

—

—

—

* Schmitt trigger inputs are circled.

B –C

B –C

F

E

B

Y

Y–A

—

Z

—

—

—

B

—

—

—

—

10

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