UPD75237GJ データシートの表示（PDF） - NEC => Renesas Technology

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UPD75237GJ

4-BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

µPD75237

1.2 NON-PORT PINS (1/2)

Pin Name

Dual-

I/O

Function Pin

Function

Input / Output

After Reset Circuit Type *

T0 to T9

T10/S15 to

T13/S12

T14/S11

T15/S10

S0 to S3

S4 to S7

S8

S9

S16 to S19

S20 to S23

Output

Digit output high-voltage high-

—

current output pins.

PH3/P153 to

PH0/P150

P143

P142

Digit/segment output dual-func-

tion high-voltage high-current

output pins. Extra pins can be

used as PORTH. These pins can

be used as PORT15 in the static

mode.

Digit/segment output dual-func-

tion high-voltage high-current

output pins. These pins can be

used as POTR14 in the static

mode.

P120 to

P123

P130 to

P133

P140

FIP controller/driver out-

put pins.

Pull-down resistor can

be incorporated in bit

units (mask option).

Segment high-voltage output

pins.

These pins can be used as

PORT12 to PORT14 in the static

mode.

VLOAD level

(when a

pull-down

resistor to

VLOAD is in-

corpo-

rated) or

high im-

pedance.

P141

P100 to

P103

P110 to

P113

Segment high-voltage output

pins.

These pins can be used as

PORT10 and PORT11 in the static

mode.

VLOAD level

(when a

pull-down

resistor to

VLOAD is in-

corpo-

rated), VSS

level (when

a pull-down

resistor to

VSS is incor-

porated) or

high im-

pedance

I–C

I–F

TI0

PTO0

PCL

BUZ

Input

P13

Output

P20

Output

P22

Output

P23

External event pulse input to timer/event counter #0 and

event counter #1.

Timer/event counter output.

Clock output.

Fixed frequency output (for buzzer or system clock trim-

ming).

SCK0

Input/

P01

output

Serial clock input/output.

Input/

Serial data output.

SO0/SB0

P02

output

Serial bus input/output.

Input/

Serial data input.

SI0/SB1

output

P03

Serial bus input/output.

* Schmitt trigger inputs are circled.

—

Input

Input

Input

Input

Input

Input

B –C

E–B

E–B

E–B

F –A

F –B

M–C

9

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