UPD75212ACW データシートの表示（PDF） - NEC => Renesas Technology
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UPD75212ACW Datasheet PDF : 70 Pages
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µPD75212A
Table 8-1 Hardware Statuses after Reset
5
Hardware
RESET Input in Standby Mode
RESET Input upon Power-on
Reset or in Operation
Program counter (PC)
Sets the low-order 6 bits of program
memory address 0000H to PC13-8 and
the contents of address 0001H to PC7-0.
Sets the low-order 6 bits of program
memory address 0000H to PC13-8 and
the contents of address 0001H to PC7-0.
PSW Carry flag (CY)
Hold
Undefined
Skip flag (SK0 to SK2)
0
0
Interrupt status flag (IST0, IST1)
0
0
Bank enable flags (MBE, RBE)
Sets bit 6 of program memory address Sets bit 6 of program memory address
0000H to RBE and bit 7 to MBE.
0000H to RBE and bit 7 to MBE.
Stack pointer (SP)
Undefined
Undefined
Data memory (RAM)
Hold*1
Undefined
General registers (X, A, H, L, D, E, B, C)
Hold
Undefined
Bank select registers (MBS, RBS)
0, 0
0, 0
Basic interval Counter (BT)
timer
Mode register (BTM)
Undefined
0
Undefined
0
Timer/event Counter (T0)
0
0
counter
Modulo register (TMOD0)
FFH
FFH
Mode register (TM0)
0
0
Timer/pulse
generator
Modulo register (MODH, MODL)
Mode register (TPGM)
Hold
0
Undefined
0
Watch timer Mode register (WM)
0
0
Serial
interface
Shift register (SIO)
Mode register (SIOM)
Hold
Undefined
Only bit 4 set to 1, other bits set to 0 Only bit 4 set to 1, other bits set to 0
Clock
Processor clock control register (PCC)
0
0
generator
System clock control register (SCC)
0
0
Interrupt
Interrupt request flag (IRQ×××)
Reset (0)
Reset (0)
Interrupt enable flag (IE×××)
0
0
Priority select register (IPS)
0
0
INT0 and INT1 mode registers (IM0, IM1)
0, 0
0, 0
Digital port Output buffer
Off
Off
Output latch
Clear (0)
Clear (0)
Input/output mode register (PMGA, PMGB)
0
0
Port H
Output latch
Hold
Undefined
FIP controller/ Display mode register (DSPM)
driver
Digit select register (DIGS)
0
1000B
0
1000B
Dimmer select register (DIMS)
0
0
Display data memory
Hold
Undefined
Output buffer
Off
Off
Power on flag (PONF)
Hold
1 or undefined*2
* 1. Data of data memory addresses 0F8H to 0FDH becomes indeterminate by RESET input.
2. 1 upon power-on reset, indeterminate after RESET input in operation.
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