UPD75212ACW データシートの表示（PDF） - NEC => Renesas Technology
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UPD75212ACW Datasheet PDF : 70 Pages
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µPD75212A
AC CHARACTERISTICS (Ta = –40 to +85 °C , VDD = 2.7 to 6.0 V)
PARAMETER
CPU clock cycle time
(minimum instruction
execution time = 1
machine cycle) *1
SYMBOL
TEST CONDITIONS
Operation with main
system clock
VDD = 4.5 to 6.0 V
tCY
Operation with sub-
system clock
MIN.
0.95
3.8
TYP. MAX. UNIT
32
µs
32
µs
114
122
125
µs
TI0 input frequency
TI0 input high and low-
level widths
SCK cycle time
VDD = 4.5 to 6.0 V
fTI
tTIH,
VDD = 4.5 to 6.0 V
tTIL
VDD = 4.5 to 6.0 V
tKCY
SCK high and low-level
widths
VDD = 4.5 to 6.0 V
tKH,
tKL
SI setup time (to SCK↑)
tSIK
SI hold time (from SCK↑)
tKSI
SO output delay time
from SCK↓
tKSO
Interrupt input high and
low-level widths
RESET low-level width
tINTH,
tINTL
tRSL
VDD = 4.5 to 6.0 V
0
0
0.83
3
Input
0.8
Output 0.95
Input
3.2
Output
3.8
Input
0.4
Output
Input
tKCY/2–50
1.6
Output tKCY/2–150
100
400
INT0
*2
INT1
2tCY
INT2, 4 10
10
0.6
165
300
1000
MHz
kHz
µs
µs
µs
µs
µs
µs
µs
ns
µs
ns
ns
ns
ns
ns
µs
µs
µs
µs
53
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