US203(2011) データシートの表示（PDF） - Unisonic Technologies
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US203 Datasheet PDF : 7 Pages
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US203
Preliminary
CMOS IC
APPLICATION INFORMATION(Cont.)
Output Filter Capacitor
To meet the requirement of the maximum droop (330mV) in the hub VBUS, a 150μF low-ESR electrolytic or
tantalum located from VOUT and GND is strongly desired. Standard bypass methods should be used to minimize
inductance and resistance between the bypass capacitor and the downstream connector to reduce EMI and
decouple voltage droop caused when downstream cables are hot-insertion transients. For EMI and ESD protection
consideration , ferrite beads in US203 with VBUS, the ground line and the 0.1μF bypass capacitors at the power
connector pins are needed. The bypass capacitor itself should have a low dissipation factor to allow decoupling at
higher frequencies.
Voltage Drop
A minimum port-output voltage in two locations on the bus is shown in the USB specification, in which, 4.75V out
of a self- powered hub port and 4.40V out of a bus-powered hub port. As with the self-powered hub, all resistive
voltage drops for the bus-powered hub must be accounted for to guarantee voltage regulation. VOUT (MIN) for multiple
ports (NPORTS) ganged together through one switch (if using one switch per port, NPORTS is equal to 1) can be
established by the following equation:
VOUT (MIN) = 4.75V − [ II x ( 4 x RCONN + 2 x RCABLE ) ] − (0.1A x NPORTS x RSWITCH ) − VPCB
Where,
RCONN = Resistance of connector contacts (two contacts per connector)
RCABLE = Resistance of upstream cable wires (one 5V and one GND)
RSWITCH = Resistance of power switch (80mΩ typical for UTC US203)
VPCB = PCB voltage drop
The USB specification defines the maximum resistance per contact (RCONN) of the USB connector to be 30mΩ and
the drop across the PCB and switch to be 100mV. This basically leaves two variables in the equation: the resistance
of the switch and the resistance of the cable. If the hub consumes the maximum current (II) of 500mA, the maximum
resistance of the cable is 90mΩ. The following equation determines the resistance of the switch:
RSWITCH= { 4.75V − 4.4V − [ 0.5A x ( 4 x 30mΩ + 2 x 90mΩ) ] − VPCB } ÷ ( 0.1A x NPORTS )
= (200mV − VPCB ) ÷ ( 0.1A x NPORTS )
If the voltage drop across the PCB is limited to 100mV, the maximum resistance for the switch is 250mΩ for four
ports ganged together. The UTC US203, with its maximum 100mΩ on-resistance over temperature, easily meets this
requirement.
PCB Layout Guide
Careful PCB layout should be taken into consideration for meeting the requirements of the voltage drop, droop,
and EMI.
The following guidelines must be paid attention.
~ Output capacitor and ferrite beads should be placed as close to the USB connectors as possible to lower
impedance (mainly inductance) between the port and the capacitor and improve transient load performance.
~ The UTC US203 should be placed as close as possible to the output port to limit switching noise.
~ Ceramic bypass capacitors should be placed as close as possible to the VIN pins of the UTC US203
~ Keep all VBUS traces as short as possible and use at least 50-mil, 2 ounce copper for all VBUS traces.
~ Avoid VIAS as much as possible. If VIAS are necessary, make them as large as feasible.
~ Place a ground plane under all circuitry to lower both resistance and inductance and improve DC and
transient performance (Use a separate ground and power plans if possible).
~ Place cuts in the ground plane between ports to help reduce the coupling of transients between ports.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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