CXA1854AR データシートの表示（PDF） - Sony Semiconductor

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CXA1854AR

Decoder/Driver/Timing Generator for Color LCD Panels

Sony Semiconductor 

Pin

No.

Symbol Pin voltage

49 B-YIN

50 R-YIN

Equivalent circuit

VCC1

49

50

GND1

200

50µA

2k

51 COUT

2.3V

52 HUE/RST

3.2V

53 COLOR

3.2V

54 XVXO

3.5V

VCC1

51

GND1

50µA

VCC1

52

GND1

6k

100k

12k

5p

3.2V

50µA

VCC1

53

GND1

100k

25k

3.2V

5p

50µA

VCC1

54

GND1

2k 500

CXA1854AR

Description

Color difference demodulation

circuit inputs during DPAL

mode.

Leave this pin open for NTSC.

Color difference signal is input

respectively when Y/color

difference input. (Standard

input is 0.15Vp-p.)

At this time, the bias is 3.5V.

Color adjusted chroma signal

is output.

When taking the chroma

signal, connect to GND with a

load resistor (approximately

5kΩ).

Color phase adjustment pin

during NTSC.

Use for detective axis

adjustment of the R-Y/B-Y

axes during SPAL.

Also doubles as the reset pin.

The system is reset when this

pin is connected to GND.

Color adjustment.

Crystal oscillator connection.

–7–

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