UAA3540 データシートの表示（PDF） - Philips Electronics

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UAA3540

DECT receiver

Philips Electronics 

Philips Semiconductors

DECT receiver

Product specification

UAA3540TS

FUNCTIONAL DESCRIPTION

General

The UAA3540TS is a fully integrated RF plus IF strip and

demodulator for DECT applications. It provides all the

required channel filtering over the DECT band and

generates analog RSSI and a data output for the

baseband chip. Very few off-chip components are required

and should not require trimming in normal applications.

The chip is designed to operate from a power supply

voltage which can fall to 3.0 V, and features full

power-down capabilities.

The inputs are an RF antenna signal and a Local

Oscillator (LO) signal. The RF antenna signal is from a

band filter or antenna switch. The higher frequency

LO signal is from an external Voltage Controlled

Oscillator (VCO).

The outputs are an RSSI voltage, representing the

instantaneous signal strength, and DATA− and DATA+

which are two high-level demodulator output signals.

DATA− is switched by SLCCTR to generate a threshold

voltage for the internal slicer, and DATA+ is the

comparator digital output.

Filter

The integrated filter provides all the channel selectivity

required for the DECT receiver. An external resistor of

18 kΩ must be connected to RSET (pin 8).

Limiter and RSSI

The main purpose of the limiter circuit is to reduce the

dynamic range of the signals presented to the

demodulator; these have a dynamic range greater than

60 dB.

The limiter also provides the RSSI output voltage.

The RSSI output has very little filtering applied, and it is

assumed that external circuits will be used to provide the

time constant and peak holding required by the DECT

specification.

Demodulator

The demodulator produces an output voltage directly

proportional to the instantaneous frequency of the

received signal. The output stage of the demodulator

contains a data filter to remove high frequencies from the

signal, prior to data slicing.

The demodulator provides a continuous output timing

signal that is applied to an internal data slicer. The same

signal is also switched to generate the threshold voltage of

the slicer during the initial DECT bit sequence.

Power-down

The power-down control input (pin 2) allows the current

consumption of the chip to be reduced to a very low level

when it is connected to VCC. In this state, some voltages in

the chip become indeterminate requiring time for the

receiver to stabilize after power-up.

2000 Feb 15

5

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