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VP1504 データシートの表示(PDF) - Supertex Inc

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VP1504 Datasheet PDF : 2 Pages
1 2
VP1504/VP1506/VP1509
P-Channel Enhancement-Mode
Vertical DMOS FETs
Ordering Information
BVDSS /
BVDGS
-40V
RDS(ON)
(max)
8.0Ω
ID(ON)
(min)
-0.5A
-60V
8.0Ω
-0.5A
-90V
8.0Ω
-0.5A
† MIL visual screening available.
Order Number / Package
Die
VP1504NW
VP1506NW
VP1509NW
Features
Free from secondary breakdown
Low power drive requirement
Ease of paralleling
Low CISS and fast switching speeds
Excellent thermal stability
Integral Source-Drain diode
High input impedance and high gain
Complementary N- and P-channel devices
Applications
Motor controls
Converters
Amplifiers
Switches
Power supply circuits
Drivers (relays, hammers, solenoids, lamps, memories,
displays, bipolar transistors, etc.)
Advanced DMOS Technology
This enhancement-mode (normally-off) transistor utilizes a
vertical DMOS structure and Supertex’s well-proven silicon-gate
manufacturing process. This combination produces a device with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
* Distance of 1.6 mm from case for 10 seconds.
BVDSS
BVDGS
±20V
-55OC to +150OC
300OC
1

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