VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC8121
2.488GHz SONET/SDH
Clock Generator
AC Characteristics
Table 2: AC Characteristics
Parameter
Description
Min Typ Max Units
Conditions
TCLK
RCd
RCf
∆fRC
tjitter
High-speed output clock period
Reference clock duty cycle
Reference clock frequency (selectable)
Reference clock frequency tolerance
Jitter generation
— 401.9 —
ps
45
—
55
%
51.84,
—
77.76,
or
—
155.52
MHz
-100
—
+100
ppm(1)
—
1.75
3.6
ps RMS
12kHz to 20MHz.
See Figure 5.
NOTE: (1) ppm refers to “parts per million.” 100ppm (100/1000000) is equivalent to 0.01%. Therefore, the equivalent reference
clock frequency range in MHz for +/-100ppm tolerance is as follows:
RCf
51.84MHz
77.76MHz
155.52MHz
X 100ppm =
5.184KHz
7.776KHz
15.552KHz
Acceptable Range
51.83MHz to 51.85MHz
77.75MHz to 77.78MHz
155.51MHz to 155.54MHz
Note that +/-100ppm tolerance for reference clock frequency more than accommodates the SONET/SDH requirement that refer-
ence clock-supplying crystals function at +/-20ppm.)
Figure 5: RMS/Peak-to-Peak Jitter (12kHz - 20MHz), REF_CLK freq = 77.76MHz
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
RMS Jitter
20
40
60
80
100
Case Temperature (deg C)
25
20
15
10
5
0
0
Pk-Pk Jitter
20
40
60
80
100
Case Temperature (deg C)
G52163-0, Rev 4.2
04/16/01
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
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