VSC8163QR データシートの表示（PDF） - Vitesse Semiconductor

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VSC8163QR

OC-48 16:1 SONET/SDH MUX with Clock Generator

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

OC-48 16:1 SONET/SDH

MUX with Clock Generator

Preliminary Data Sheet

VSC8163

Table 1: AC Characteristics

Parameters

Description

Min Typ Max Units

Conditions

TDSU

TDH

TDOR,TDOF

tCLKR, tCLKF

CLK16OD

CLKID

RCKD

CLKOD

CLKOPER

Data setup time to the rising

edge of CLK16I+

Data hold time after the

rising edge of CLK16+

DO± rise and fall time

CLK16O± rise and fall times

CLK16O± duty cycle

CLK16I± duty cycle

Reference clock duty cycle

CLKO duty cycle

CLKO period

CLK16OPER CLK16O period

tSET

DO setup time with respect

to rising CLKO edge

tHOLD

DO hold time with respect to

rising CLKO edge

Clock Multiplier Performance

TDJ

Output data jitter

TCJ

Jittertol

Output clock jitter

Jitter tolerance

Tuning Range

0.75 —

—

1.0

—

—

—

— 120

—

— 250

40

—

60

30

—

70

40

—

60

40

—

60

— 401.9 —

—

6.4

—

—

90

—

—

310 —

—

—

4

—

—

4

—

—

—

-100

+100

ns

ns

ps

20% to 80% into 100Ω load

See Figure 6

ps See Figures 3 and 4

%

% Assuming 10% distortion of CLKO

%

%

ps

SONET based 77.76MHz or

155.52MHz reference clock

ns

SONET based 77.76MHz or

155.52MHz reference clock

ps

Inverting CLKO will switch (approx)

tSET and tHOLD values.

ps

Inverting CLKO will switch (approx)

tSET and tHOLD values.

rms, tested to SONET specification

ps (12kHz to 20MHz) with 2ps rms jitter

on REFCLK.

rms, tested to SONET specification

ps (12kHz to 20MHz) with 2ps rms jitter

on REFCLK.

— Exceeds SONET/SDH mask

ppm

Page 8

© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

G52216-0, Rev 3.3

01/05/00

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