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VSC8201DL データシートの表示(PDF) - Vitesse Semiconductor

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VSC8201DL Datasheet PDF : 21 Pages
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VSC8201DL
Regulator Circuit
For systems with a single power supply, the VSC8201 provides an option to generate the 1.5v supply from the 3.3v supply by using the
on chip regulator. The internal regulator is enabled by having a 10k pull-up on the REG_EN pin.
To use the Regulator the following additional components are required:
• FET device, similar to Fairchild FDT439N.
• For decoupling, two 0.0047uF capacitors with 10% tolerance or better. NPO, X7R or X5R are all acceptable.
Systems with single 3.3v,+/-10% Wake on LAN supply
The following figure shows the circuit for generating the 1.5v supply using a 3.3v,+/-10% supply
Figure 5: Regulator Circuit using 3.3v, +/-10% supply
Key points
• Place a 0.0047uF capacitor as close to REG_OUT as possible.
• Place a 0.0047uF capacitor as close to the FET as possible.
• Tie the GND line together with VREFN, capacitor connected to REF_FILT, resistor R4 (See figure above) and then connect to a com-
mon ground.
• VREFP should be connected to the analog 3.3v plane i.e. V+A33.
Using ActiPHYTM Power Management
The VSC8201 supports a new power saving mode called ActiPHYTM, particularly suited to power saving applications like laptop comput-
ers with wake on LAN capability.1
When in ActiPHYTM mode the PHY is in one of two power down states and has the ability to detect valid signal energy levels at the
media pins and convey it to the station manager.
1. Refer VSC8201 Datasheet.
Rev. 1.6.3 - 9/29/04
VITESSE - CONFIDENTIAL & PROPRIETARY - DO NOT COPY WITHOUT PERMISSION
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