W83115RG-BW データシートの表示（PDF） - Winbond
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W83115RG-BW Datasheet PDF : 30 Pages
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W83115RG-BW/W83115WG-BW
STEPLESS FOR INTEL BROADWATER CLOCK GENERATOR
PIN DESCRIPTION, continued.
PIN
PIN NAME
27 SRCT4
28 SRCC4
29 CPU_STOP#/SRCC5
30 PCI_STOP#/SRCT5
31 VDDSRC
32 SRCC6
33 SRCT6
34 GNDSRC
35 SRCC7/CR#_E
36 SRCT7/CR#_F
37 VDDSRCIO
38 CPUC2_ITP/SRCC8
39 CPUT2_ITP/SRCT8
40 VOUT
41 VDDCPUIO
42 CPUC1
43 CPUT1
44 GNDCPU
45 CPUC0
46 CPUT0
47 VDDCPU
48 CK_PWRGD/PD#
49 FSB/TEST_MODE
50 GNDREF
51 XOUT
TYPE
OUT
OUT
I/O
I/O
PWR
OUT
OUT
PWR
I/O
I/O
PWR
OUT
OUT
PWR
PWR
OUT
OUT
PWR
OUT
OUT
PWR
IN
IN
PWR
OUT
DESCRIPTION
0.8V clock outputs for SRCT4
0.8V clock outputs for SRCC4
CPU_STOP# or 0.8V clock output for SRCC5
PCI_STOP# or 0.8V clock output for SRCT5
Power supply for core
0.8V clock output for SRCC6
0.8V clock output for SRCT6
Ground pin
0.8V clock output for SRCC7 or CLKREQ# control for
SRC6 pair
0.8V clock output for SRCT7 or CLKREQ# control for
SRC8 pair
Low voltage I/O power supply for SRC
0.8V clock output for CPUC2_ITP or SRCC8
0.8V clock output for CPUT2_ITP or SRCT8
Integrated linear regulator voltage control
Low voltage I/O power supply for CPU
0.8V clock outputs for CPUC1
0.8V clock outputs for CPUT1
Ground pin
0.8V clock outputs for CPUC0
0.8V clock outputs for CPUT0
Power supply for core
Notifies CK505 to sample latched input or power down
mode
FSB CPU frequency select or entry to test mode input
Ground pin
Crystal output at 14.318MHz nominally with internal
loading capacitors (18pF).
Publication Release Date: December, 2006
-5-
Revision 1.0
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