WM8143-12 データシートの表示（PDF） - Wolfson Microelectronics plc

部品番号

コンポーネント説明

メーカー

WM8143-12

12-bit/4MSPS CCD Signal Processor

Wolfson Microelectronics plc 

Production Data

WM8143-12

PIN

NAME

28

MCLK

TYPE

Digital IP

29

DGND

Digital supply

30

OP[0]

Digital OP

31

OP[1]

Digital OP

32

DVDD

Digital supply

Typical Performance

AVDD = DVDD = 5V, TA = 25oC

WM8143-12 DNL

2

DESCRIPTION

Master clock. This clock is applied at eight, six, three or two times the input pixel rate

depending on the operational mode. MCLK is divided internally to define the ADC

sample rate and to provide the clock source for digital logic

Digital ground (0V)

See description for pins 1-10

See description for pins 1-10

Positive digital supply (5V)

1.5

1

0.5

0

-0.5

-1

-1.5

-2

0

8.25

8

7.75

7.5

7.25

7

6.75

6.5

6.25

6

5.75

5.5

5.25

5

4.75

4.5

4.25

4

3.75

3.5

3.25

3

2.75

2.5

2.25

2

1.75

1.5

1.25

1

0.75

0.5

0.25

0

0

512

1024

1536

2048

2560

3072

3584

4096

ADC Code

PGA Gain Code vs Actual Gain

RED

GREEN

BLUE

1

2

3

4

5

6

7

8

9

Actual Gain

Wolfson Microelectronics

7

PD. Rev 4 Nov. 99

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