WM8711L(2006) データシートの表示（PDF） - Wolfson Microelectronics plc
部品番号
コンポーネント説明
メーカー
WM8711L
(Rev.:2006)
(Rev.:2006)
Wolfson Microelectronics plc
WM8711L Datasheet PDF : 47 Pages
| |||
Production Data
WM8711 / WM8711L
PIN DESCRIPTION
28 LEAD
SSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
28 LEAD
QFN
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
NAME
DBVDD
CLKOUT
BCLK
DACDAT
DACLRC
HPVDD
LHPOUT
RHPOUT
HPGND
LOUT
ROUT
AVDD
AGND
VMID
RLINEIN
LLINEIN
MODE
CSB
TYPE
DESCRIPTION
Supply
Digital Output
Digital Input/Output
Digital Input
Digital Input/Output
NC
NC
Supply
Analogue Output
Analogue Output
Ground
Analogue Output
Analogue Output
Supply
Ground
Analogue Output
NC
NC
Analogue Input
Analogue Input
Digital Input
Digital Input
Digital Buffers VDD
Buffered Clock Output
Digital Audio Bit Clock, Pull Down (see Note 1)
DAC Digital Audio Data Input
DAC Sample Rate Left/Right Clock, Pull Down (see Note 1)
No Connection
No Connection
Headphone VDD
Left Channel Headphone Output
Right Channel Headphone Output
Headphone GND
Left Channel Line Output
Right Channel Line Output
Analogue VDD
Analogue GND
Mid-rail reference decoupling point
No Connection
No Connection
Right Channel Line Input (AC coupled)
Left Channel Line Input (AC coupled)
Control Interface Selection, Pull up (see Note 1)
3-Wire MPU Chip Select/ 2-Wire MPU interface address
selection, active low, Pull up (see Note 1)
23
27
24
28
25
1
26
2
27
3
28
4
SDIN
SCLK
XTI/MCLK
XTO
DCVDD
DGND
Digital Input/Output
Digital Input
Digital Input
Digital Output
Supply
Ground
3-Wire MPU Data Input / 2-Wire MPU Data Input
3-Wire MPU Clock Input / 2-Wire MPU Clock Input
Crystal Input or Master Clock Input (MCLK)
Crystal Output
Digital Core VDD
Digital GND
Note:
1. Pull Up/Down only present when Control Register Interface ACTIVE=0 to conserve power.
2. It is recommended that the QFN ground paddle is connected to analogue ground on the application PCB.
w
PD Rev 4.3 September 2006
5
Share Link: