WM8785GEDS(2005) データシートの表示（PDF） - Wolfson Microelectronics plc
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WM8785GEDS Datasheet PDF : 31 Pages
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WM8785
Pre-Production
CONTROL INTERFACE TIMING – 2-WIRE MODE
t3
t5
t3
SDIN
t4
t6
t2
t8
SCLK
t1
t7
t9
Figure 5 Control Interface Timing – 2-Wire Serial Control Mode
Test Conditions
DVDD = 3.3V, DVDD = 3.3V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, MCLK = 256fs, 24-bit data, unless otherwise
stated.
PARAMETER
Program Register Input Information
SCLK Frequency
SCLK Low Pulse-Width
SCLK High Pulse-Width
Hold Time (Start Condition)
Setup Time (Start Condition)
Data Setup Time
SDIN, SCLK Rise Time
SDIN, SCLK Fall Time
Setup Time (Stop Condition)
Data Hold Time
Pulse width of spikes that will be suppressed
SYMBOL
t1
t2
t3
t4
t5
t6
t7
t8
t9
tps
MIN
TYP
MAX
UNIT
0
5
MHz
80
ns
80
us
600
ns
600
ns
100
ns
300
ns
300
ns
600
ns
900
ns
4
6
ns
w
PP Rev 3.0 December 2005
10
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