Features (Continued)
■ Two SMBus (SMB) Interface Modules; each module:
— Is Intel SMBus, Philips I2C® and ACCESS.bus
compatible
— Is SMBus master and slave
— Supports up to two simultaneous slave addresses
— Supports polling- and interrupt-controlled operations
— Generates a wake-up signal on detection of a Start
condition while in Idle mode
— Supports an optional internal pull-up on SDA and
SCL pins
■ Core Universal Asynchronous Receiver-Transmitter
(CR_UART) Module
— A full-duplex UART channel
— Programmable baud rate
— Data transfer via interrupt or polling
■ Two 16-bit Multi-Function Timer (MFT16) Modules;
each module has:
— Two 16-bit timers with a 5-bit prescaler
— Pulse Width Modulation (PWM), Capture and
Timer/Counter modes
— Capture inputs with programmable edge detection
— An interrupt on compare match
■ Two Pulse Width Modulation (PWM) Modules
— Group A_PWM: two outputs
— Group B_PWM: one output
■ Serial Peripheral Interface (SPI) Module
— Bus master
— 8-bit interface
— Up to 10 MHz data clock rate
— Clock can be selected to be high or low in Idle mode
— Clock polarity can be selected for normal (sample on
rising edge) or alternate (sample on falling edge)
■ Timer and Watchdog (TWD)
— 16-bit periodic interrupt timer with 30 µs resolution
and 5-bit prescaler for system tick and periodic
wake-up tasks
— 8-bit watchdog timer with enable/disable
— “Watchdog occurred” flag
— Two watchdog reset options: warm or cold
■ SensorPath™ Bus Interface
— Single Wire bus master
— Supports up to seven slave devices
— x1, x4 SensorPath clock rate support
■ Analog-to-Digital Converter (ADC)
— Six channels, with 8-bit resolution
— 125 µs conversion time
— External voltage reference
■ Digital-to-Analog Converter (DAC)
— Four channels, 8-bit resolution
— 1 µs conversion time for 50 pF load
— Full output range from AGND to AVCC
■ Development Support
— Interface to debugger via Nexus 5001 interface
❏ Physical connection using JTAG
❏ On-board Debug mode with eight hardware
breakpoints
❏ Embedded memory programing via JTAG with
content read protection
■ Core Access to Host Modules
— Enabled via lock mechanism
Host Function Features
■ Mobile System Wake-Up Control (MSWC)
— Software-controlled off events
— Event routing to IRQ, SMI or PWUREQ
■ Host- or Core-Controlled CEIR (Consumer Electronic
IR) Receiver
— Supports RC-5, RC-6 and NEC protocols
— Wake-up on a pre-configured message
■ Infrared Port
— Supports IR learning and emitting
— Software compatible with the 16550A and the 16450
— Shadow register support for write-only bit monitoring
— HP-SIR
— ASK-IR option of SHARP-IR
— DASK-IR option of SHARP-IR
— Consumer Remote Control supports RC-5, RC-6,
NEC, RCA and RECS 80
■ Fast Infrared (FIR) Port (WPC8768L only)
— Software compatible with the 16550A and the 16450
— Shadow register support for write-only bit monitoring
— FIR IrDA 1.1 compliant
— HP-SIR
— ASK-IR option of SHARP-IR
— DASK-IR option of SHARP-IR
— Consumer Remote Control supports RC-5, RC-6,
NEC, RCA and RECS 80
— DMA support: one or two channels
■ Serial Port (SP)
— In the WPC8768L, SP can be used only when FIR is
not needed
— Software compatible with the 16550A and the 16450
— Shadow register support for write-only bit monitoring
— UART data rates up to 1.5 Mbaud
■ Supports Microsoft® Advanced Power Management
(APM) Specifications Revision 1.2, February 1996
— Generates the System Management Interrupt (SMI)
■ PC01 Rev 1.0 and ACPI 3.0 Compliant
— PnP configuration register structure
— Flexible resource allocation for all logical devices
❏ Relocatable base address
❏ 15 IRQ routing options
❏ Four optional 8-bit DMA channels (where applicable)
Revision 1.0
3
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