X25163 データシートの表示（PDF） - Xicor -> Intersil

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X25163

Programmable Watchdog Timer & VCC Supervisory Circuit w/Serial E2PROM

Xicor -> Intersil 

X25643/45

X25323/25

X25163/65

Data Output Timing

Symbol

fSCK

tDIS

tV

tHO

tRO(3)

tFO(3)

Parameter

Clock Frequency

Output Disable Time

Output Valid from Clock Low

Output Hold Time

Output Rise Time

Output Fall Time

Voltage Range

2.7V–5.5V

1.8V–3.6V

2.7V–5.5V

1.8V–3.6V

2.7V–5.5V

1.8V–3.6V

2.7V–5.5V

1.8V–3.6V

2.7V–5.5V

1.8V–3.6V

2.7V–5.5V

1.8V–3.6V

Min.

0

0

Max.

2

1

250

200

400

100

100

Notes:

(3) This parameter is periodically sampled and not 100% tested.

(4) tWC is the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal

nonvolatile write cycle.

Units

MHz

ns

ns

ns

ns

ns

7036 FRM T14

10

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