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X76F641H データシートの表示(PDF) - Xicor -> Intersil

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コンポーネント説明
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X76F641H
Xicor
Xicor -> Intersil Xicor
X76F641H Datasheet PDF : 17 Pages
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X76F641
PIN DESCRIPTIONS
Serial Clock (SCL)
The SCL input is used to clock all data into and out of the
device.
Serial Data (SDA)
SDA is a true three state serial data input/output pin. Dur-
ing a read cycle, data is shifted out on this pin. During a
write cycle, data is shifted in on this pin. In all other
cases, this pin is in a high impedance state.
Reset (RST)
RST is a device reset pin. When RST is pulsed high the
X76F641 will output 32 bits of fixed data which conforms
to the standard for “synchronous response to reset”. The
part must not be in a write cycle for the response to reset
to occur. See Figure 11. If there is power interrupted dur-
ing the Response to Reset, the response to reset will be
aborted and the part will return to the standby state. The
response to reset is "mask programmable" only!
DEVICE OPERATION
There are two primary modes of operation for the
X76F641; Protected READ and protected WRITE.
Protected operations must be performed with one of four
8-byte passwords.
The basic method of communication for the device is
generating a start condition, then transmitting a com-
mand, followed by the correct password. All parts will be
shipped from the factory with all passwords equal to ‘0’.
The user must perform ACK Polling to determine the
validity of the password, before starting a data transfer
(see Acknowledge Polling.) Only after the correct pass-
word is accepted and a ACK polling has been performed,
can the data transfer occur.
To ensure the correct communication, RST must remain
LOW under all conditions except when running a
“Response to Reset sequence”.
Data is transferred in 8-bit segments, with each transfer
being followed by an ACK, generated by the receiving
device.
If the X76F641 is in a nonvolatile write cycle a “no ACK”
(SDA=High) response will be issued in response to load-
ing of the command byte. If a stop is issued prior to the
nonvolatile write cycle the write operation will be termi-
nated and the part will reset and enter into a standby
mode.
The basic sequence is illustrated in Figure 1.
PIN NAMES
Symbol
SDA
SCL
RST
Vcc
Vss
NC
Description
Serial Data Input/Output
Serial Clock Input
Reset Input
Supply Voltage
Ground
No Connect
PIN CONFIGURATION
Smart Card
VSS
NC
SDA
NC
EIAJ SOIC
1
8
2
7
3
6
4
5
VCC
RST
SCL
NC
VCC
RST
SCL
NC
GND
NC
SDA
NC
7025 FM 02
After each transaction is completed, the X76F641 will
reset and enter into a standby mode. This will also be the
response if an unsuccessful attempt is made to access a
protected array.
2

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