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ICX084AL データシートの表示(PDF) - Sony Semiconductor

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ICX084AL Datasheet PDF : 17 Pages
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ICX084AL
Bias Conditions
Item
Symbol
Min.
Typ.
Max.
Unit Remarks
Supply voltage
VDD
14.55
15.0
15.45
V
Protective transistor bias VL
1
Substrate clock
φSUB
2
1 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL
power supply for the V driver should be used.
2 Set SUBCIR pin to open when applying a DC bias to the substrate clock pin.
DC Characteristics
Item
Supply current
Symbol Min.
IDD
Typ.
6
Max.
8
Unit Remarks
mA
Clock Voltage Conditions
Item
Symbol
Min.
Typ.
Max.
Unit
Waveform
diagram
Remarks
Readout clock voltage VVT
14.55 15.0 15.45 V
1
VVH02
–0.05 0 0.05 V
2
VVH = VVH02
VVH1, VVH2, VVH3 –0.2 0 0.05 V
2
VVL1, VVL2, VVL3 –8.0 –7.5 –7.0 V
2
VVL = (VVL1 + VVL3)/2
Vertical transfer clock
voltage
Vφ1, Vφ2, Vφ3
I VVL1–VVL3 I
VVHH
6.8 7.5 8.05 V
0.1 V
1.0 V
2
2
2
High-level coupling
VVHL
2.3 V
2
High-level coupling
VVLH
1.0 V
2
Low-level coupling
VVLL
1.0 V
2
Low-level coupling
Horizontal transfer
VφH
clock voltage
VHL
4.75 5.0 5.25 V
3
–0.05 0 0.05 V
3
Reset gate clock
voltage
VφRG
VRGLH – VRGLL
VRGH
4.5 5.0 5.5 V
0.8 V
VDD VDD VDD
+0.4 +0.6 +0.8
V
4
Input through 0.01µF
capacitance
4
Low-level coupling
4
Substrate clock voltage VφSUB
21.5 22.5 23.5 V
5
–3–

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